20a7835f8f
Migrate jazz driver to the new 'set-state' interface provided by clockevents core, the earlier 'set-mode' interface is marked obsolete now. This also enables us to implement callbacks for new states of clockevent devices, for example: ONESHOT_STOPPED. We weren't doing anything in the ->set_mode() callback. So, this patch doesn't provide any set-state callbacks. Signed-off-by: Viresh Kumar <viresh.kumar@linaro.org> Cc: Daniel Lezcano <daniel.lezcano@linaro.org> Cc: linux-mips@linux-mips.org Cc: linaro-kernel@lists.linaro.org Cc: Thomas Gleixner <tglx@linutronix.de> Patchwork: https://patchwork.linux-mips.org/patch/10600/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
156 lines
4.0 KiB
C
156 lines
4.0 KiB
C
/*
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* This file is subject to the terms and conditions of the GNU General Public
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* License. See the file "COPYING" in the main directory of this archive
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* for more details.
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*
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* Copyright (C) 1992 Linus Torvalds
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* Copyright (C) 1994 - 2001, 2003, 07 Ralf Baechle
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*/
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#include <linux/clockchips.h>
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#include <linux/i8253.h>
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#include <linux/init.h>
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#include <linux/interrupt.h>
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#include <linux/kernel.h>
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#include <linux/smp.h>
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#include <linux/spinlock.h>
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#include <linux/irq.h>
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#include <asm/irq_cpu.h>
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#include <asm/i8259.h>
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#include <asm/io.h>
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#include <asm/jazz.h>
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#include <asm/pgtable.h>
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#include <asm/tlbmisc.h>
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static DEFINE_RAW_SPINLOCK(r4030_lock);
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static void enable_r4030_irq(struct irq_data *d)
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{
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unsigned int mask = 1 << (d->irq - JAZZ_IRQ_START);
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unsigned long flags;
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raw_spin_lock_irqsave(&r4030_lock, flags);
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mask |= r4030_read_reg16(JAZZ_IO_IRQ_ENABLE);
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r4030_write_reg16(JAZZ_IO_IRQ_ENABLE, mask);
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raw_spin_unlock_irqrestore(&r4030_lock, flags);
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}
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void disable_r4030_irq(struct irq_data *d)
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{
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unsigned int mask = ~(1 << (d->irq - JAZZ_IRQ_START));
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unsigned long flags;
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raw_spin_lock_irqsave(&r4030_lock, flags);
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mask &= r4030_read_reg16(JAZZ_IO_IRQ_ENABLE);
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r4030_write_reg16(JAZZ_IO_IRQ_ENABLE, mask);
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raw_spin_unlock_irqrestore(&r4030_lock, flags);
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}
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static struct irq_chip r4030_irq_type = {
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.name = "R4030",
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.irq_mask = disable_r4030_irq,
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.irq_unmask = enable_r4030_irq,
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};
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void __init init_r4030_ints(void)
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{
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int i;
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for (i = JAZZ_IRQ_START; i <= JAZZ_IRQ_END; i++)
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irq_set_chip_and_handler(i, &r4030_irq_type, handle_level_irq);
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r4030_write_reg16(JAZZ_IO_IRQ_ENABLE, 0);
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r4030_read_reg16(JAZZ_IO_IRQ_SOURCE); /* clear pending IRQs */
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r4030_read_reg32(JAZZ_R4030_INVAL_ADDR); /* clear error bits */
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}
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/*
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* On systems with i8259-style interrupt controllers we assume for
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* driver compatibility reasons interrupts 0 - 15 to be the i8259
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* interrupts even if the hardware uses a different interrupt numbering.
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*/
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void __init arch_init_irq(void)
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{
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/*
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* this is a hack to get back the still needed wired mapping
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* killed by init_mm()
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*/
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/* Map 0xe0000000 -> 0x0:800005C0, 0xe0010000 -> 0x1:30000580 */
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add_wired_entry(0x02000017, 0x03c00017, 0xe0000000, PM_64K);
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/* Map 0xe2000000 -> 0x0:900005C0, 0xe3010000 -> 0x0:910005C0 */
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add_wired_entry(0x02400017, 0x02440017, 0xe2000000, PM_16M);
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/* Map 0xe4000000 -> 0x0:600005C0, 0xe4100000 -> 400005C0 */
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add_wired_entry(0x01800017, 0x01000017, 0xe4000000, PM_4M);
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init_i8259_irqs(); /* Integrated i8259 */
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mips_cpu_irq_init();
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init_r4030_ints();
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change_c0_status(ST0_IM, IE_IRQ2 | IE_IRQ1);
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}
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asmlinkage void plat_irq_dispatch(void)
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{
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unsigned int pending = read_c0_cause() & read_c0_status();
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unsigned int irq;
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if (pending & IE_IRQ4) {
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r4030_read_reg32(JAZZ_TIMER_REGISTER);
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do_IRQ(JAZZ_TIMER_IRQ);
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} else if (pending & IE_IRQ2) {
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irq = *(volatile u8 *)JAZZ_EISA_IRQ_ACK;
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do_IRQ(irq);
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} else if (pending & IE_IRQ1) {
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irq = *(volatile u8 *)JAZZ_IO_IRQ_SOURCE >> 2;
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if (likely(irq > 0))
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do_IRQ(irq + JAZZ_IRQ_START - 1);
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else
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panic("Unimplemented loc_no_irq handler");
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}
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}
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struct clock_event_device r4030_clockevent = {
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.name = "r4030",
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.features = CLOCK_EVT_FEAT_PERIODIC,
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.rating = 300,
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.irq = JAZZ_TIMER_IRQ,
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};
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static irqreturn_t r4030_timer_interrupt(int irq, void *dev_id)
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{
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struct clock_event_device *cd = dev_id;
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cd->event_handler(cd);
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return IRQ_HANDLED;
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}
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static struct irqaction r4030_timer_irqaction = {
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.handler = r4030_timer_interrupt,
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.flags = IRQF_TIMER,
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.name = "R4030 timer",
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};
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void __init plat_time_init(void)
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{
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struct clock_event_device *cd = &r4030_clockevent;
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struct irqaction *action = &r4030_timer_irqaction;
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unsigned int cpu = smp_processor_id();
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BUG_ON(HZ != 100);
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cd->cpumask = cpumask_of(cpu);
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clockevents_register_device(cd);
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action->dev_id = cd;
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setup_irq(JAZZ_TIMER_IRQ, action);
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/*
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* Set clock to 100Hz.
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*
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* The R4030 timer receives an input clock of 1kHz which is divieded by
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* a programmable 4-bit divider. This makes it fairly inflexible.
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*/
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r4030_write_reg32(JAZZ_TIMER_INTERVAL, 9);
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setup_pit_timer();
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}
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