3acbec356d
[ Upstream commit 91dc288f4edf0d768e46c2c6d33e0ab703403459 ] When neither LANTIQ nor MIPS_MALTA is set, 'physical_memsize' is not declared. This causes the build to fail with: mips-linux-ld: arch/mips/kernel/vpe-mt.o: in function `vpe_run': arch/mips/kernel/vpe-mt.c:(.text.vpe_run+0x280): undefined reference to `physical_memsize' LANTIQ is not using 'physical_memsize' and MIPS_MALTA's use of it is self-contained in mti-malta/malta-dtshim.c. Use of physical_memsize in vpe-mt.c appears to be unused, so eliminate this loader mode completely and require VPE programs to be compiled with DFLT_STACK_SIZE and DFLT_HEAP_SIZE defined. Fixes:9050d50e22
("MIPS: lantiq: Set physical_memsize") Fixes:1a2a6d7e88
("MIPS: APRP: Split VPE loader into separate files.") Signed-off-by: Randy Dunlap <rdunlap@infradead.org> Reported-by: kernel test robot <lkp@intel.com> Link: https://lore.kernel.org/all/202302030625.2g3E98sY-lkp@intel.com/ Cc: Dengcheng Zhu <dzhu@wavecomp.com> Cc: John Crispin <john@phrozen.org> Cc: Thomas Bogendoerfer <tsbogend@alpha.franken.de> Cc: Philippe Mathieu-Daudé <philmd@linaro.org> Cc: "Steven J. Hill" <Steven.Hill@imgtec.com> Cc: Qais Yousef <Qais.Yousef@imgtec.com> Cc: Yang Yingliang <yangyingliang@huawei.com> Cc: Hauke Mehrtens <hauke@hauke-m.de> Cc: James Hogan <jhogan@kernel.org> Cc: linux-mips@vger.kernel.org Signed-off-by: Thomas Bogendoerfer <tsbogend@alpha.franken.de> Signed-off-by: Sasha Levin <sashal@kernel.org>
521 lines
11 KiB
C
521 lines
11 KiB
C
/*
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* This file is subject to the terms and conditions of the GNU General Public
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* License. See the file "COPYING" in the main directory of this archive
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* for more details.
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*
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* Copyright (C) 2004, 2005 MIPS Technologies, Inc. All rights reserved.
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* Copyright (C) 2013 Imagination Technologies Ltd.
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*/
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#include <linux/kernel.h>
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#include <linux/device.h>
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#include <linux/fs.h>
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#include <linux/slab.h>
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#include <linux/export.h>
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#include <asm/mipsregs.h>
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#include <asm/mipsmtregs.h>
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#include <asm/mips_mt.h>
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#include <asm/vpe.h>
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static int major;
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/* The number of TCs and VPEs physically available on the core */
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static int hw_tcs, hw_vpes;
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/* We are prepared so configure and start the VPE... */
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int vpe_run(struct vpe *v)
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{
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unsigned long flags, val, dmt_flag;
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struct vpe_notifications *notifier;
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unsigned int vpeflags;
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struct tc *t;
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/* check we are the Master VPE */
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local_irq_save(flags);
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val = read_c0_vpeconf0();
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if (!(val & VPECONF0_MVP)) {
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pr_warn("VPE loader: only Master VPE's are able to config MT\n");
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local_irq_restore(flags);
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return -1;
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}
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dmt_flag = dmt();
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vpeflags = dvpe();
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if (list_empty(&v->tc)) {
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evpe(vpeflags);
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emt(dmt_flag);
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local_irq_restore(flags);
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pr_warn("VPE loader: No TC's associated with VPE %d\n",
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v->minor);
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return -ENOEXEC;
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}
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t = list_first_entry(&v->tc, struct tc, tc);
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/* Put MVPE's into 'configuration state' */
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set_c0_mvpcontrol(MVPCONTROL_VPC);
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settc(t->index);
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/* should check it is halted, and not activated */
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if ((read_tc_c0_tcstatus() & TCSTATUS_A) ||
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!(read_tc_c0_tchalt() & TCHALT_H)) {
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evpe(vpeflags);
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emt(dmt_flag);
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local_irq_restore(flags);
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pr_warn("VPE loader: TC %d is already active!\n",
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t->index);
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return -ENOEXEC;
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}
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/*
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* Write the address we want it to start running from in the TCPC
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* register.
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*/
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write_tc_c0_tcrestart((unsigned long)v->__start);
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write_tc_c0_tccontext((unsigned long)0);
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/*
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* Mark the TC as activated, not interrupt exempt and not dynamically
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* allocatable
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*/
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val = read_tc_c0_tcstatus();
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val = (val & ~(TCSTATUS_DA | TCSTATUS_IXMT)) | TCSTATUS_A;
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write_tc_c0_tcstatus(val);
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write_tc_c0_tchalt(read_tc_c0_tchalt() & ~TCHALT_H);
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/*
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* We don't pass the memsize here, so VPE programs need to be
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* compiled with DFLT_STACK_SIZE and DFLT_HEAP_SIZE defined.
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*/
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mttgpr(7, 0);
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mttgpr(6, v->ntcs);
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/* set up VPE1 */
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/*
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* bind the TC to VPE 1 as late as possible so we only have the final
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* VPE registers to set up, and so an EJTAG probe can trigger on it
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*/
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write_tc_c0_tcbind((read_tc_c0_tcbind() & ~TCBIND_CURVPE) | 1);
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write_vpe_c0_vpeconf0(read_vpe_c0_vpeconf0() & ~(VPECONF0_VPA));
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back_to_back_c0_hazard();
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/* Set up the XTC bit in vpeconf0 to point at our tc */
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write_vpe_c0_vpeconf0((read_vpe_c0_vpeconf0() & ~(VPECONF0_XTC))
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| (t->index << VPECONF0_XTC_SHIFT));
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back_to_back_c0_hazard();
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/* enable this VPE */
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write_vpe_c0_vpeconf0(read_vpe_c0_vpeconf0() | VPECONF0_VPA);
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/* clear out any left overs from a previous program */
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write_vpe_c0_status(0);
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write_vpe_c0_cause(0);
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/* take system out of configuration state */
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clear_c0_mvpcontrol(MVPCONTROL_VPC);
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/*
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* SMVP kernels manage VPE enable independently, but uniprocessor
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* kernels need to turn it on, even if that wasn't the pre-dvpe() state.
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*/
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#ifdef CONFIG_SMP
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evpe(vpeflags);
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#else
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evpe(EVPE_ENABLE);
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#endif
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emt(dmt_flag);
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local_irq_restore(flags);
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list_for_each_entry(notifier, &v->notify, list)
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notifier->start(VPE_MODULE_MINOR);
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return 0;
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}
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void cleanup_tc(struct tc *tc)
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{
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unsigned long flags;
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unsigned int mtflags, vpflags;
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int tmp;
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local_irq_save(flags);
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mtflags = dmt();
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vpflags = dvpe();
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/* Put MVPE's into 'configuration state' */
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set_c0_mvpcontrol(MVPCONTROL_VPC);
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settc(tc->index);
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tmp = read_tc_c0_tcstatus();
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/* mark not allocated and not dynamically allocatable */
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tmp &= ~(TCSTATUS_A | TCSTATUS_DA);
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tmp |= TCSTATUS_IXMT; /* interrupt exempt */
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write_tc_c0_tcstatus(tmp);
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write_tc_c0_tchalt(TCHALT_H);
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mips_ihb();
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clear_c0_mvpcontrol(MVPCONTROL_VPC);
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evpe(vpflags);
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emt(mtflags);
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local_irq_restore(flags);
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}
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/* module wrapper entry points */
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/* give me a vpe */
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void *vpe_alloc(void)
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{
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int i;
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struct vpe *v;
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/* find a vpe */
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for (i = 1; i < MAX_VPES; i++) {
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v = get_vpe(i);
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if (v != NULL) {
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v->state = VPE_STATE_INUSE;
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return v;
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}
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}
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return NULL;
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}
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EXPORT_SYMBOL(vpe_alloc);
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/* start running from here */
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int vpe_start(void *vpe, unsigned long start)
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{
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struct vpe *v = vpe;
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v->__start = start;
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return vpe_run(v);
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}
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EXPORT_SYMBOL(vpe_start);
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/* halt it for now */
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int vpe_stop(void *vpe)
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{
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struct vpe *v = vpe;
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struct tc *t;
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unsigned int evpe_flags;
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evpe_flags = dvpe();
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t = list_entry(v->tc.next, struct tc, tc);
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if (t != NULL) {
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settc(t->index);
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write_vpe_c0_vpeconf0(read_vpe_c0_vpeconf0() & ~VPECONF0_VPA);
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}
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evpe(evpe_flags);
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return 0;
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}
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EXPORT_SYMBOL(vpe_stop);
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/* I've done with it thank you */
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int vpe_free(void *vpe)
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{
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struct vpe *v = vpe;
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struct tc *t;
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unsigned int evpe_flags;
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t = list_entry(v->tc.next, struct tc, tc);
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if (t == NULL)
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return -ENOEXEC;
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evpe_flags = dvpe();
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/* Put MVPE's into 'configuration state' */
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set_c0_mvpcontrol(MVPCONTROL_VPC);
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settc(t->index);
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write_vpe_c0_vpeconf0(read_vpe_c0_vpeconf0() & ~VPECONF0_VPA);
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/* halt the TC */
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write_tc_c0_tchalt(TCHALT_H);
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mips_ihb();
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/* mark the TC unallocated */
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write_tc_c0_tcstatus(read_tc_c0_tcstatus() & ~TCSTATUS_A);
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v->state = VPE_STATE_UNUSED;
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clear_c0_mvpcontrol(MVPCONTROL_VPC);
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evpe(evpe_flags);
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return 0;
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}
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EXPORT_SYMBOL(vpe_free);
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static ssize_t store_kill(struct device *dev, struct device_attribute *attr,
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const char *buf, size_t len)
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{
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struct vpe *vpe = get_vpe(aprp_cpu_index());
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struct vpe_notifications *notifier;
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list_for_each_entry(notifier, &vpe->notify, list)
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notifier->stop(aprp_cpu_index());
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release_progmem(vpe->load_addr);
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cleanup_tc(get_tc(aprp_cpu_index()));
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vpe_stop(vpe);
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vpe_free(vpe);
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return len;
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}
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static DEVICE_ATTR(kill, S_IWUSR, NULL, store_kill);
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static ssize_t ntcs_show(struct device *cd, struct device_attribute *attr,
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char *buf)
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{
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struct vpe *vpe = get_vpe(aprp_cpu_index());
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return sprintf(buf, "%d\n", vpe->ntcs);
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}
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static ssize_t ntcs_store(struct device *dev, struct device_attribute *attr,
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const char *buf, size_t len)
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{
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struct vpe *vpe = get_vpe(aprp_cpu_index());
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unsigned long new;
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int ret;
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ret = kstrtoul(buf, 0, &new);
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if (ret < 0)
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return ret;
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if (new == 0 || new > (hw_tcs - aprp_cpu_index()))
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return -EINVAL;
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vpe->ntcs = new;
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return len;
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}
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static DEVICE_ATTR_RW(ntcs);
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static struct attribute *vpe_attrs[] = {
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&dev_attr_kill.attr,
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&dev_attr_ntcs.attr,
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NULL,
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};
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ATTRIBUTE_GROUPS(vpe);
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static void vpe_device_release(struct device *cd)
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{
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}
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static struct class vpe_class = {
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.name = "vpe",
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.owner = THIS_MODULE,
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.dev_release = vpe_device_release,
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.dev_groups = vpe_groups,
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};
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static struct device vpe_device;
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int __init vpe_module_init(void)
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{
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unsigned int mtflags, vpflags;
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unsigned long flags, val;
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struct vpe *v = NULL;
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struct tc *t;
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int tc, err;
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if (!cpu_has_mipsmt) {
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pr_warn("VPE loader: not a MIPS MT capable processor\n");
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return -ENODEV;
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}
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if (vpelimit == 0) {
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pr_warn("No VPEs reserved for AP/SP, not initialize VPE loader\n"
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"Pass maxvpes=<n> argument as kernel argument\n");
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return -ENODEV;
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}
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if (aprp_cpu_index() == 0) {
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pr_warn("No TCs reserved for AP/SP, not initialize VPE loader\n"
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"Pass maxtcs=<n> argument as kernel argument\n");
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return -ENODEV;
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}
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major = register_chrdev(0, VPE_MODULE_NAME, &vpe_fops);
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if (major < 0) {
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pr_warn("VPE loader: unable to register character device\n");
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return major;
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}
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err = class_register(&vpe_class);
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if (err) {
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pr_err("vpe_class registration failed\n");
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goto out_chrdev;
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}
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device_initialize(&vpe_device);
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vpe_device.class = &vpe_class,
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vpe_device.parent = NULL,
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dev_set_name(&vpe_device, "vpe1");
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vpe_device.devt = MKDEV(major, VPE_MODULE_MINOR);
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err = device_add(&vpe_device);
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if (err) {
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pr_err("Adding vpe_device failed\n");
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goto out_class;
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}
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local_irq_save(flags);
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mtflags = dmt();
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vpflags = dvpe();
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/* Put MVPE's into 'configuration state' */
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set_c0_mvpcontrol(MVPCONTROL_VPC);
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val = read_c0_mvpconf0();
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hw_tcs = (val & MVPCONF0_PTC) + 1;
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hw_vpes = ((val & MVPCONF0_PVPE) >> MVPCONF0_PVPE_SHIFT) + 1;
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for (tc = aprp_cpu_index(); tc < hw_tcs; tc++) {
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/*
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* Must re-enable multithreading temporarily or in case we
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* reschedule send IPIs or similar we might hang.
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*/
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clear_c0_mvpcontrol(MVPCONTROL_VPC);
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evpe(vpflags);
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emt(mtflags);
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local_irq_restore(flags);
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t = alloc_tc(tc);
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if (!t) {
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err = -ENOMEM;
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goto out_dev;
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}
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local_irq_save(flags);
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mtflags = dmt();
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vpflags = dvpe();
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set_c0_mvpcontrol(MVPCONTROL_VPC);
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/* VPE's */
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if (tc < hw_tcs) {
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settc(tc);
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v = alloc_vpe(tc);
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if (v == NULL) {
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pr_warn("VPE: unable to allocate VPE\n");
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goto out_reenable;
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}
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v->ntcs = hw_tcs - aprp_cpu_index();
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/* add the tc to the list of this vpe's tc's. */
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list_add(&t->tc, &v->tc);
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/* deactivate all but vpe0 */
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if (tc >= aprp_cpu_index()) {
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unsigned long tmp = read_vpe_c0_vpeconf0();
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tmp &= ~VPECONF0_VPA;
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/* master VPE */
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tmp |= VPECONF0_MVP;
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write_vpe_c0_vpeconf0(tmp);
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}
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/* disable multi-threading with TC's */
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write_vpe_c0_vpecontrol(read_vpe_c0_vpecontrol() &
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~VPECONTROL_TE);
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if (tc >= vpelimit) {
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/*
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* Set config to be the same as vpe0,
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* particularly kseg0 coherency alg
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*/
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write_vpe_c0_config(read_c0_config());
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}
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}
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/* TC's */
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t->pvpe = v; /* set the parent vpe */
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if (tc >= aprp_cpu_index()) {
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unsigned long tmp;
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settc(tc);
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/*
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* A TC that is bound to any other VPE gets bound to
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* VPE0, ideally I'd like to make it homeless but it
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* doesn't appear to let me bind a TC to a non-existent
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* VPE. Which is perfectly reasonable.
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*
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* The (un)bound state is visible to an EJTAG probe so
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* may notify GDB...
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*/
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tmp = read_tc_c0_tcbind();
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if (tmp & TCBIND_CURVPE) {
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/* tc is bound >vpe0 */
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write_tc_c0_tcbind(tmp & ~TCBIND_CURVPE);
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t->pvpe = get_vpe(0); /* set the parent vpe */
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}
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/* halt the TC */
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write_tc_c0_tchalt(TCHALT_H);
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mips_ihb();
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tmp = read_tc_c0_tcstatus();
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/* mark not activated and not dynamically allocatable */
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tmp &= ~(TCSTATUS_A | TCSTATUS_DA);
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tmp |= TCSTATUS_IXMT; /* interrupt exempt */
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write_tc_c0_tcstatus(tmp);
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}
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}
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out_reenable:
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/* release config state */
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clear_c0_mvpcontrol(MVPCONTROL_VPC);
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evpe(vpflags);
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emt(mtflags);
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local_irq_restore(flags);
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return 0;
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out_dev:
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device_del(&vpe_device);
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out_class:
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put_device(&vpe_device);
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class_unregister(&vpe_class);
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out_chrdev:
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unregister_chrdev(major, VPE_MODULE_NAME);
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return err;
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}
|
|
|
|
void __exit vpe_module_exit(void)
|
|
{
|
|
struct vpe *v, *n;
|
|
|
|
device_unregister(&vpe_device);
|
|
class_unregister(&vpe_class);
|
|
unregister_chrdev(major, VPE_MODULE_NAME);
|
|
|
|
/* No locking needed here */
|
|
list_for_each_entry_safe(v, n, &vpecontrol.vpe_list, list) {
|
|
if (v->state != VPE_STATE_UNUSED)
|
|
release_vpe(v);
|
|
}
|
|
}
|