148d4f4dc7
[ Upstream commit e63d6fb5637e92725cf143559672a34b706bca4f ]
Enabling CONFIG_TAU_INT causes random crashes:
Unrecoverable exception 1700 at c0009414 (msr=1000)
Oops: Unrecoverable exception, sig: 6 [#1]
BE PAGE_SIZE=4K MMU=Hash SMP NR_CPUS=2 PowerMac
Modules linked in:
CPU: 0 PID: 0 Comm: swapper/0 Not tainted 5.7.0-pmac-00043-gd5f545e1a8593 #5
NIP: c0009414 LR: c0009414 CTR: c00116fc
REGS: c0799eb8 TRAP: 1700 Not tainted (5.7.0-pmac-00043-gd5f545e1a8593)
MSR: 00001000 <ME> CR: 22000228 XER: 00000100
GPR00: 00000000 c0799f70 c076e300 00800000 0291c0ac 00e00000 c076e300 00049032
GPR08: 00000001 c00116fc 00000000 dfbd3200 ffffffff 007f80a8 00000000 00000000
GPR16: 00000000 00000000 00000000 00000000 00000000 00000000 00000000 c075ce04
GPR24: c075ce04 dfff8880 c07b0000 c075ce04 00080000 00000001 c079ef98 c079ef5c
NIP [c0009414] arch_cpu_idle+0x24/0x6c
LR [c0009414] arch_cpu_idle+0x24/0x6c
Call Trace:
[c0799f70] [00000001] 0x1 (unreliable)
[c0799f80] [c0060990] do_idle+0xd8/0x17c
[c0799fa0] [c0060ba4] cpu_startup_entry+0x20/0x28
[c0799fb0] [c072d220] start_kernel+0x434/0x44c
[c0799ff0] [00003860] 0x3860
Instruction dump:
XXXXXXXX XXXXXXXX XXXXXXXX 3d20c07b XXXXXXXX XXXXXXXX XXXXXXXX 7c0802a6
XXXXXXXX XXXXXXXX XXXXXXXX 4e800421 XXXXXXXX XXXXXXXX XXXXXXXX 7d2000a6
---[ end trace 3a0c9b5cb216db6b ]---
Resolve this problem by disabling each THRMn comparator when handling
the associated THRMn interrupt and by disabling the TAU entirely when
updating THRMn thresholds.
Fixes: 1da177e4c3
("Linux-2.6.12-rc2")
Signed-off-by: Finn Thain <fthain@telegraphics.com.au>
Tested-by: Stan Johnson <userm57@yahoo.com>
Signed-off-by: Michael Ellerman <mpe@ellerman.id.au>
Link: https://lore.kernel.org/r/5a0ba3dc5612c7aac596727331284a3676c08472.1599260540.git.fthain@telegraphics.com.au
Signed-off-by: Sasha Levin <sashal@kernel.org>
241 lines
5.6 KiB
C
241 lines
5.6 KiB
C
// SPDX-License-Identifier: GPL-2.0
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/*
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* temp.c Thermal management for cpu's with Thermal Assist Units
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*
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* Written by Troy Benjegerdes <hozer@drgw.net>
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*
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* TODO:
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* dynamic power management to limit peak CPU temp (using ICTC)
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* calibration???
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*
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* Silly, crazy ideas: use cpu load (from scheduler) and ICTC to extend battery
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* life in portables, and add a 'performance/watt' metric somewhere in /proc
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*/
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#include <linux/errno.h>
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#include <linux/kernel.h>
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#include <linux/param.h>
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#include <linux/string.h>
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#include <linux/mm.h>
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#include <linux/interrupt.h>
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#include <linux/init.h>
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#include <linux/delay.h>
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#include <linux/workqueue.h>
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#include <asm/io.h>
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#include <asm/reg.h>
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#include <asm/nvram.h>
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#include <asm/cache.h>
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#include <asm/8xx_immap.h>
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#include <asm/machdep.h>
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#include <asm/asm-prototypes.h>
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#include "setup.h"
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static struct tau_temp
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{
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int interrupts;
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unsigned char low;
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unsigned char high;
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unsigned char grew;
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} tau[NR_CPUS];
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static bool tau_int_enable;
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/* TODO: put these in a /proc interface, with some sanity checks, and maybe
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* dynamic adjustment to minimize # of interrupts */
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/* configurable values for step size and how much to expand the window when
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* we get an interrupt. These are based on the limit that was out of range */
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#define step_size 2 /* step size when temp goes out of range */
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#define window_expand 1 /* expand the window by this much */
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/* configurable values for shrinking the window */
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#define shrink_timer 2000 /* period between shrinking the window */
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#define min_window 2 /* minimum window size, degrees C */
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static void set_thresholds(unsigned long cpu)
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{
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u32 maybe_tie = tau_int_enable ? THRM1_TIE : 0;
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/* setup THRM1, threshold, valid bit, interrupt when below threshold */
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mtspr(SPRN_THRM1, THRM1_THRES(tau[cpu].low) | THRM1_V | maybe_tie | THRM1_TID);
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/* setup THRM2, threshold, valid bit, interrupt when above threshold */
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mtspr(SPRN_THRM2, THRM1_THRES(tau[cpu].high) | THRM1_V | maybe_tie);
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}
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static void TAUupdate(int cpu)
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{
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u32 thrm;
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u32 bits = THRM1_TIV | THRM1_TIN | THRM1_V;
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/* if both thresholds are crossed, the step_sizes cancel out
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* and the window winds up getting expanded twice. */
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thrm = mfspr(SPRN_THRM1);
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if ((thrm & bits) == bits) {
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mtspr(SPRN_THRM1, 0);
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if (tau[cpu].low >= step_size) {
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tau[cpu].low -= step_size;
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tau[cpu].high -= (step_size - window_expand);
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}
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tau[cpu].grew = 1;
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pr_debug("%s: low threshold crossed\n", __func__);
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}
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thrm = mfspr(SPRN_THRM2);
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if ((thrm & bits) == bits) {
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mtspr(SPRN_THRM2, 0);
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if (tau[cpu].high <= 127 - step_size) {
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tau[cpu].low += (step_size - window_expand);
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tau[cpu].high += step_size;
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}
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tau[cpu].grew = 1;
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pr_debug("%s: high threshold crossed\n", __func__);
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}
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}
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#ifdef CONFIG_TAU_INT
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/*
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* TAU interrupts - called when we have a thermal assist unit interrupt
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* with interrupts disabled
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*/
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void TAUException(struct pt_regs * regs)
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{
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int cpu = smp_processor_id();
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irq_enter();
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tau[cpu].interrupts++;
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TAUupdate(cpu);
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irq_exit();
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}
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#endif /* CONFIG_TAU_INT */
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static void tau_timeout(void * info)
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{
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int cpu;
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int size;
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int shrink;
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cpu = smp_processor_id();
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if (!tau_int_enable)
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TAUupdate(cpu);
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/* Stop thermal sensor comparisons and interrupts */
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mtspr(SPRN_THRM3, 0);
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size = tau[cpu].high - tau[cpu].low;
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if (size > min_window && ! tau[cpu].grew) {
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/* do an exponential shrink of half the amount currently over size */
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shrink = (2 + size - min_window) / 4;
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if (shrink) {
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tau[cpu].low += shrink;
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tau[cpu].high -= shrink;
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} else { /* size must have been min_window + 1 */
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tau[cpu].low += 1;
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#if 1 /* debug */
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if ((tau[cpu].high - tau[cpu].low) != min_window){
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printk(KERN_ERR "temp.c: line %d, logic error\n", __LINE__);
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}
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#endif
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}
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}
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tau[cpu].grew = 0;
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set_thresholds(cpu);
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/* Restart thermal sensor comparisons and interrupts.
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* The "PowerPC 740 and PowerPC 750 Microprocessor Datasheet"
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* recommends that "the maximum value be set in THRM3 under all
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* conditions."
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*/
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mtspr(SPRN_THRM3, THRM3_SITV(0x1fff) | THRM3_E);
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}
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static struct workqueue_struct *tau_workq;
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static void tau_work_func(struct work_struct *work)
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{
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msleep(shrink_timer);
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on_each_cpu(tau_timeout, NULL, 0);
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/* schedule ourselves to be run again */
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queue_work(tau_workq, work);
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}
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DECLARE_WORK(tau_work, tau_work_func);
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/*
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* setup the TAU
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*
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* Set things up to use THRM1 as a temperature lower bound, and THRM2 as an upper bound.
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* Start off at zero
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*/
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int tau_initialized = 0;
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static void __init TAU_init_smp(void *info)
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{
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unsigned long cpu = smp_processor_id();
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/* set these to a reasonable value and let the timer shrink the
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* window */
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tau[cpu].low = 5;
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tau[cpu].high = 120;
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set_thresholds(cpu);
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}
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static int __init TAU_init(void)
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{
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/* We assume in SMP that if one CPU has TAU support, they
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* all have it --BenH
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*/
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if (!cpu_has_feature(CPU_FTR_TAU)) {
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printk("Thermal assist unit not available\n");
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tau_initialized = 0;
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return 1;
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}
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tau_int_enable = IS_ENABLED(CONFIG_TAU_INT) &&
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!strcmp(cur_cpu_spec->platform, "ppc750");
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tau_workq = alloc_workqueue("tau", WQ_UNBOUND, 1, 0);
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if (!tau_workq)
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return -ENOMEM;
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on_each_cpu(TAU_init_smp, NULL, 0);
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queue_work(tau_workq, &tau_work);
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pr_info("Thermal assist unit using %s, shrink_timer: %d ms\n",
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tau_int_enable ? "interrupts" : "workqueue", shrink_timer);
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tau_initialized = 1;
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return 0;
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}
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__initcall(TAU_init);
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/*
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* return current temp
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*/
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u32 cpu_temp_both(unsigned long cpu)
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{
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return ((tau[cpu].high << 16) | tau[cpu].low);
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}
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u32 cpu_temp(unsigned long cpu)
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{
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return ((tau[cpu].high + tau[cpu].low) / 2);
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}
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u32 tau_interrupts(unsigned long cpu)
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{
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return (tau[cpu].interrupts);
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}
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