2f12dbf190
If we just use the CSRs that these map to directly the code is simpler and doesn't require extra inline assembly code. Also fix up the top-level comment in timer-riscv.c to not talk about the cycle count or mention details of the clocksource interface, of which this file is just a consumer. Signed-off-by: Christoph Hellwig <hch@lst.de> Reviewed-by: Atish Patra <atish.patra@wdc.com> Signed-off-by: Paul Walmsley <paul.walmsley@sifive.com>
51 lines
880 B
C
51 lines
880 B
C
/* SPDX-License-Identifier: GPL-2.0-only */
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/*
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* Copyright (C) 2012 Regents of the University of California
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*/
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#ifndef _ASM_RISCV_TIMEX_H
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#define _ASM_RISCV_TIMEX_H
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#include <asm/csr.h>
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typedef unsigned long cycles_t;
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static inline cycles_t get_cycles(void)
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{
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return csr_read(CSR_TIME);
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}
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#define get_cycles get_cycles
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#ifdef CONFIG_64BIT
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static inline u64 get_cycles64(void)
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{
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return get_cycles();
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}
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#else /* CONFIG_64BIT */
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static inline u32 get_cycles_hi(void)
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{
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return csr_read(CSR_TIMEH);
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}
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static inline u64 get_cycles64(void)
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{
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u32 hi, lo;
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do {
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hi = get_cycles_hi();
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lo = get_cycles();
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} while (hi != get_cycles_hi());
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return ((u64)hi << 32) | lo;
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}
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#endif /* CONFIG_64BIT */
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#define ARCH_HAS_READ_CURRENT_TIMER
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static inline int read_current_timer(unsigned long *timer_val)
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{
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*timer_val = get_cycles();
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return 0;
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}
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#endif /* _ASM_RISCV_TIMEX_H */
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