6f52b16c5b
Many user space API headers are missing licensing information, which makes it hard for compliance tools to determine the correct license. By default are files without license information under the default license of the kernel, which is GPLV2. Marking them GPLV2 would exclude them from being included in non GPLV2 code, which is obviously not intended. The user space API headers fall under the syscall exception which is in the kernels COPYING file: NOTE! This copyright does *not* cover user programs that use kernel services by normal system calls - this is merely considered normal use of the kernel, and does *not* fall under the heading of "derived work". otherwise syscall usage would not be possible. Update the files which contain no license information with an SPDX license identifier. The chosen identifier is 'GPL-2.0 WITH Linux-syscall-note' which is the officially assigned identifier for the Linux syscall exception. SPDX license identifiers are a legally binding shorthand, which can be used instead of the full boiler plate text. This patch is based on work done by Thomas Gleixner and Kate Stewart and Philippe Ombredanne. See the previous patch in this series for the methodology of how this patch was researched. Reviewed-by: Kate Stewart <kstewart@linuxfoundation.org> Reviewed-by: Philippe Ombredanne <pombredanne@nexb.com> Reviewed-by: Thomas Gleixner <tglx@linutronix.de> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
47 lines
2.0 KiB
C
47 lines
2.0 KiB
C
/* SPDX-License-Identifier: GPL-2.0 WITH Linux-syscall-note */
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#ifndef _SPARC64_PSRCOMPAT_H
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#define _SPARC64_PSRCOMPAT_H
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#include <asm/pstate.h>
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/* Old 32-bit PSR fields for the compatibility conversion code. */
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#define PSR_CWP 0x0000001f /* current window pointer */
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#define PSR_ET 0x00000020 /* enable traps field */
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#define PSR_PS 0x00000040 /* previous privilege level */
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#define PSR_S 0x00000080 /* current privilege level */
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#define PSR_PIL 0x00000f00 /* processor interrupt level */
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#define PSR_EF 0x00001000 /* enable floating point */
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#define PSR_EC 0x00002000 /* enable co-processor */
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#define PSR_SYSCALL 0x00004000 /* inside of a syscall */
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#define PSR_LE 0x00008000 /* SuperSparcII little-endian */
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#define PSR_ICC 0x00f00000 /* integer condition codes */
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#define PSR_C 0x00100000 /* carry bit */
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#define PSR_V 0x00200000 /* overflow bit */
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#define PSR_Z 0x00400000 /* zero bit */
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#define PSR_N 0x00800000 /* negative bit */
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#define PSR_VERS 0x0f000000 /* cpu-version field */
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#define PSR_IMPL 0xf0000000 /* cpu-implementation field */
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#define PSR_V8PLUS 0xff000000 /* fake impl/ver, meaning a 64bit CPU is present */
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#define PSR_XCC 0x000f0000 /* if PSR_V8PLUS, this is %xcc */
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static inline unsigned int tstate_to_psr(unsigned long tstate)
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{
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return ((tstate & TSTATE_CWP) |
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PSR_S |
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((tstate & TSTATE_ICC) >> 12) |
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((tstate & TSTATE_XCC) >> 20) |
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((tstate & TSTATE_SYSCALL) ? PSR_SYSCALL : 0) |
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PSR_V8PLUS);
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}
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static inline unsigned long psr_to_tstate_icc(unsigned int psr)
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{
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unsigned long tstate = ((unsigned long)(psr & PSR_ICC)) << 12;
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if ((psr & (PSR_VERS|PSR_IMPL)) == PSR_V8PLUS)
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tstate |= ((unsigned long)(psr & PSR_XCC)) << 20;
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return tstate;
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}
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#endif /* !(_SPARC64_PSRCOMPAT_H) */
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