e646feb198
Add APIs which provide per GPU freq active and total time, number of GPU frequency corners and number of frames processed by GPU. Change-Id: If42e76a435a4766a3de0b9b028d48b6c1759e466 Signed-off-by: Deepak Kumar <dkumar@codeaurora.org>
272 lines
9.0 KiB
C
272 lines
9.0 KiB
C
/* SPDX-License-Identifier: GPL-2.0-only */
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/*
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* Copyright (c) 2010-2021, The Linux Foundation. All rights reserved.
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*/
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#ifndef __KGSL_PWRCTRL_H
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#define __KGSL_PWRCTRL_H
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#include <linux/clk.h>
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/*****************************************************************************
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* power flags
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****************************************************************************/
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#define KGSL_PWRFLAGS_ON 1
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#define KGSL_PWRFLAGS_OFF 0
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#define KGSL_PWRLEVEL_TURBO 0
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#define KGSL_PWR_ON 0xFFFF
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#define KGSL_MAX_CLKS 18
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#define KGSL_MAX_PWRLEVELS 16
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#define KGSL_PWRFLAGS_POWER_ON 0
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#define KGSL_PWRFLAGS_CLK_ON 1
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#define KGSL_PWRFLAGS_AXI_ON 2
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#define KGSL_PWRFLAGS_IRQ_ON 3
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#define KGSL_PWRFLAGS_NAP_OFF 5
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/* Only two supported levels, min & max */
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#define KGSL_CONSTRAINT_PWR_MAXLEVELS 2
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#define KGSL_XO_CLK_FREQ 19200000
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#define KGSL_RBBMTIMER_CLK_FREQ KGSL_XO_CLK_FREQ
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#define KGSL_ISENSE_CLK_FREQ 200000000
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#define KGSL_PWRLEVEL_OFF -1
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enum kgsl_pwrctrl_timer_type {
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KGSL_PWR_IDLE_TIMER,
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};
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struct platform_device;
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struct icc_path;
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struct kgsl_clk_stats {
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unsigned int busy;
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unsigned int total;
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unsigned int busy_old;
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unsigned int total_old;
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};
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struct kgsl_pwr_constraint {
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unsigned int type;
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unsigned int sub_type;
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union {
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struct {
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unsigned int level;
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} pwrlevel;
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} hint;
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unsigned long expires;
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uint32_t owner_id;
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};
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/**
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* struct kgsl_pwrlevel - Struct holding different pwrlevel info obtained from
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* from dtsi file
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* @gpu_freq: GPU frequency vote in Hz
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* @bus_freq: Bus bandwidth vote index
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* @bus_min: Min bus index @gpu_freq
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* @bus_max: Max bus index @gpu_freq
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*/
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struct kgsl_pwrlevel {
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unsigned int gpu_freq;
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unsigned int bus_freq;
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unsigned int bus_min;
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unsigned int bus_max;
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unsigned int acd_level;
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/** @voltage_level: Voltage level used by the GMU to vote RPMh */
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u32 voltage_level;
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};
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/**
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* struct kgsl_pwrctrl - Power control settings for a KGSL device
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* @interrupt_num - The interrupt number for the device
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* @grp_clks - Array of clocks structures that we control
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* @power_flags - Control flags for power
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* @pwrlevels - List of supported power levels
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* @nb - Notifier block to receive GPU OPP change event
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* @active_pwrlevel - The currently active power level
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* @previous_pwrlevel - The power level before transition
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* @thermal_pwrlevel - consolidated maximum thermal powerlevel constraint
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* @sysfs_thermal_pwrlevel - maximum powerlevel constraint from sysfs
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* @cooling_thermal_pwrlevel - maximum pwrlevel constraint from devfreq cooling fw
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* @thermal_pwrlevel_floor - minimum powerlevel constraint from thermal
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* @default_pwrlevel - device wake up power level
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* @max_pwrlevel - maximum allowable powerlevel per the user
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* @min_pwrlevel - minimum allowable powerlevel per the user
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* @num_pwrlevels - number of available power levels
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* @throttle_mask - LM throttle mask
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* @interval_timeout - timeout to be idle before a power event
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* @clock_times - Each GPU frequency's accumulated active time in us
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* @clk_stats - structure of clock statistics
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* @input_disable - To disable GPU wakeup on touch input event
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* @bus_control - true if the bus calculation is independent
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* @bus_mod - modifier from the current power level for the bus vote
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* @bus_percent_ab - current percent of total possible bus usage
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* @bus_width - target specific bus width in number of bytes
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* @bus_ab_mbytes - AB vote in Mbytes for current bus usage
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* @constraint - currently active power constraint
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* @superfast - Boolean flag to indicate that the GPU start should be run in the
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* higher priority thread
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* isense_clk_indx - index of isense clock, 0 if no isense
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* isense_clk_on_level - isense clock rate is XO rate below this level.
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*/
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struct kgsl_pwrctrl {
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int interrupt_num;
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struct clk *grp_clks[KGSL_MAX_CLKS];
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struct clk *gpu_bimc_int_clk;
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/** @cx_gdsc: Pointer to the CX domain regulator if applicable */
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struct regulator *cx_gdsc;
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/** @gx_gdsc: Pointer to the GX domain regulator if applicable */
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struct regulator *gx_gdsc;
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/** @gx_gdsc: Pointer to the GX domain parent supply */
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struct regulator *gx_gdsc_parent;
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/** @gx_gdsc_parent_min_corner: Minimum supply voltage for GX parent */
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u32 gx_gdsc_parent_min_corner;
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int isense_clk_indx;
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int isense_clk_on_level;
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unsigned long power_flags;
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unsigned long ctrl_flags;
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struct kgsl_pwrlevel pwrlevels[KGSL_MAX_PWRLEVELS];
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struct notifier_block nb;
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unsigned int active_pwrlevel;
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unsigned int previous_pwrlevel;
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unsigned int thermal_pwrlevel;
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unsigned int sysfs_thermal_pwrlevel;
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unsigned int cooling_thermal_pwrlevel;
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unsigned int thermal_pwrlevel_floor;
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unsigned int default_pwrlevel;
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unsigned int wakeup_maxpwrlevel;
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unsigned int max_pwrlevel;
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unsigned int min_pwrlevel;
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unsigned int num_pwrlevels;
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unsigned int throttle_mask;
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unsigned long interval_timeout;
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u64 clock_times[KGSL_MAX_PWRLEVELS];
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struct kgsl_clk_stats clk_stats;
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bool input_disable;
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bool bus_control;
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int bus_mod;
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unsigned int bus_percent_ab;
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unsigned int bus_width;
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unsigned long bus_ab_mbytes;
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/** @ddr_table: List of the DDR bandwidths in KBps for the target */
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u32 *ddr_table;
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/** @ddr_table_count: Number of objects in @ddr_table */
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int ddr_table_count;
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/** cur_buslevel: The last buslevel voted by the driver */
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int cur_buslevel;
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/** @bus_max: The maximum bandwidth available to the device */
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unsigned long bus_max;
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struct kgsl_pwr_constraint constraint;
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bool superfast;
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unsigned int gpu_bimc_int_clk_freq;
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bool gpu_bimc_interface_enabled;
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/** @icc_path: Interconnect path for the GPU (if applicable) */
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struct icc_path *icc_path;
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/** cur_ab: The last ab voted by the driver */
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u32 cur_ab;
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/** @minbw_timer - Timer struct for entering minimum bandwidth state */
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struct timer_list minbw_timer;
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/** @minbw_timeout - Timeout for entering minimum bandwidth state */
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u32 minbw_timeout;
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/** @ddr_qos_devfreq: Devfreq device for setting DDR qos policy */
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struct devfreq *ddr_qos_devfreq;
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/** @time_in_pwrlevel: Each pwrlevel active duration in usec */
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u64 time_in_pwrlevel[KGSL_MAX_PWRLEVELS];
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/** @last_stat_updated: The last time stats were updated */
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ktime_t last_stat_updated;
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};
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int kgsl_pwrctrl_init(struct kgsl_device *device);
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void kgsl_pwrctrl_close(struct kgsl_device *device);
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void kgsl_timer(struct timer_list *t);
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void kgsl_pre_hwaccess(struct kgsl_device *device);
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void kgsl_pwrctrl_pwrlevel_change(struct kgsl_device *device,
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unsigned int level);
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int kgsl_pwrctrl_init_sysfs(struct kgsl_device *device);
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int kgsl_pwrctrl_change_state(struct kgsl_device *device, int state);
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unsigned int kgsl_pwrctrl_adjust_pwrlevel(struct kgsl_device *device,
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unsigned int new_level);
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static inline unsigned long kgsl_get_clkrate(struct clk *clk)
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{
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return (clk != NULL) ? clk_get_rate(clk) : 0;
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}
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/*
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* kgsl_pwrctrl_active_freq - get currently configured frequency
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* @pwr: kgsl_pwrctrl structure for the device
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*
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* Returns the currently configured frequency for the device.
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*/
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static inline unsigned long
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kgsl_pwrctrl_active_freq(struct kgsl_pwrctrl *pwr)
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{
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return pwr->pwrlevels[pwr->active_pwrlevel].gpu_freq;
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}
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/**
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* kgsl_active_count_wait() - Wait for activity to finish.
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* @device: Pointer to a KGSL device
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* @count: Active count value to wait for
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* @wait_jiffies: Jiffies to wait
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*
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* Block until the active_cnt value hits the desired value
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*/
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int kgsl_active_count_wait(struct kgsl_device *device, int count,
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unsigned long wait_jiffies);
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void kgsl_pwrctrl_busy_time(struct kgsl_device *device, u64 time, u64 busy);
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void kgsl_pwrctrl_set_constraint(struct kgsl_device *device,
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struct kgsl_pwr_constraint *pwrc, uint32_t id);
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int kgsl_pwrctrl_set_default_gpu_pwrlevel(struct kgsl_device *device);
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/**
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* kgsl_pwrctrl_request_state - Request a specific power state
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* @device: Pointer to the kgsl device
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* @state: Power state requested
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*/
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void kgsl_pwrctrl_request_state(struct kgsl_device *device, u32 state);
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/**
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* kgsl_pwrctrl_axi - Propagate bus votes during slumber entry and exit
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* @device: Pointer to the kgsl device
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* @state: Whether we are going to slumber or coming out of slumber
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*
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* This function will propagate the default bus vote when coming out of
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* slumber and set bus bandwidth to 0 when going into slumber
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*
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* Return: 0 on success or negative error on failure
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*/
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int kgsl_pwrctrl_axi(struct kgsl_device *device, int state);
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/**
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* kgsl_idle_check - kgsl idle function
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* @work: work item being run by the function
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*
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* This function is called for work that is queued by the interrupt
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* handler or the idle timer. It attempts to transition to a clocks
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* off state if the active_cnt is 0 and the hardware is idle.
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*/
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void kgsl_idle_check(struct work_struct *work);
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/**
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* kgsl_pwrctrl_irq - Enable or disable gpu interrupts
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* @device: Handle to the kgsl device
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* @state: Variable to decide whether interrupts need to be enabled or disabled
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*
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*/
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void kgsl_pwrctrl_irq(struct kgsl_device *device, int state);
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/**
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* kgsl_pwrctrl_clear_l3_vote - Relinquish l3 vote
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* @device: Handle to the kgsl device
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*
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* Clear the l3 vote when going into slumber
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*/
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void kgsl_pwrctrl_clear_l3_vote(struct kgsl_device *device);
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#endif /* __KGSL_PWRCTRL_H */
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