android_kernel_xiaomi_sm8350/drivers/hwtracing/coresight/coresight-ost.h
Rama Aparna Mallavarapu 2aa23d3acc coresight: ost: Add snapshot of Coresight OST driver
This is a snapshot of the coresight-cti driver as of msm-4.14
commit '7d42028b99d32ad6ec82aa429378fba0280a1c4a'.byte-cntr: Read 64bit rwp
TMC RWP has two 32bit registers which combine to one 64bit register.
Read correct RWP register in byte counter driver.
Make necessary change to adopt coresight framework change.

Change-Id: I4a89b9b041c354093b96e01ee0436a7372ff37fd
Signed-off-by: Rama Aparna Mallavarapu <aparnam@codeaurora.org>
Signed-off-by: Mulu He <muluhe@codeaurora.org>
Signed-off-by: Tingwei Zhang <tingwei@codeaurora.org>
2019-12-12 13:58:50 +08:00

38 lines
910 B
C

/* SPDX-License-Identifier: GPL-2.0-only */
/*
* Copyright (c) 2012-2017, The Linux Foundation. All rights reserved.
*/
#ifndef _CORESIGHT_CORESIGHT_OST_H
#define _CORESIGHT_CORESIGHT_OST_H
#include <linux/types.h>
#include <linux/coresight-stm.h>
#ifdef CONFIG_CORESIGHT_OST
static inline bool stm_ost_configured(void) { return true; }
extern ssize_t stm_ost_packet(struct stm_data *stm_data,
unsigned int size,
const unsigned char *buf);
extern int stm_set_ost_params(struct device *dev, struct stm_drvdata *drvdata,
size_t bitmap_size);
#else
static inline bool stm_ost_configured(void) { return false; }
static inline ssize_t stm_ost_packet(struct stm_data *stm_data,
unsigned int size,
const unsigned char *buf)
{
return 0;
}
static inline int stm_set_ost_params(struct stm_drvdata *drvdata,
size_t bitmap_size)
{
return 0;
}
#endif
#endif