3efa7f1feb
- Fix Tegra OF node reference leak (Nishka Dasgupta)
- Add #defines for PCIe Data Link Feature and Physical Layer 16.0 GT/s
features (Vidya Sagar)
- Disable MSI for Tegra Root Ports since they don't support using MSI for
all Root Port events (Vidya Sagar)
- Group DesignWare write-protected register writes together (Vidya Sagar)
- Move DesignWare capability search interfaces so they can be used by
both host and endpoint drivers (Vidya Sagar)
- Add DesignWare extended capability search interfaces (Vidya Sagar)
- Export dw_pcie_wait_for_link() so drivers can be modules (Vidya Sagar)
- Add "snps,enable-cdm-check" DT binding for Configuration Dependent
Module (CDM) register checking (Vidya Sagar)
- Add DesignWare support for "snps,enable-cdm-check" CDM checking (Vidya
Sagar)
- Add "supports-clkreq" DT binding for host drivers to decide whether to
advertise low power features (Vidya Sagar)
- Add DT binding for Tegra194 (Vidya Sagar)
- Add DT binding for Tegra194 P2U (PIPE to UPHY) block (Vidya Sagar)
- Add support for Tegra194 P2U (PIPE to UPHY) (Vidya Sagar)
- Add support for Tegra194 host controller (Vidya Sagar)
- Add Tegra support for sideband PERST# and CLKREQ# for C5 (Vidya Sagar)
- Add Tegra support for slot regulators for p2972-0000 platform (Vidya
Sagar)
* lorenzo/pci/tegra:
arm64: tegra: Add PCIe slot supply information in p2972-0000 platform
arm64: tegra: Add configuration for PCIe C5 sideband signals
PCI: tegra: Add support to enable slot regulators
PCI: tegra: Add support to configure sideband pins
dt-bindings: PCI: tegra: Add PCIe slot supplies regulator entries
dt-bindings: PCI: tegra: Add sideband pins configuration entries
PCI: tegra: Add Tegra194 PCIe support
phy: tegra: Add PCIe PIPE2UPHY support
dt-bindings: PHY: P2U: Add Tegra194 P2U block
dt-bindings: PCI: tegra: Add device tree support for Tegra194
dt-bindings: Add PCIe supports-clkreq property
PCI: dwc: Add support to enable CDM register check
dt-bindings: PCI: designware: Add binding for CDM register check
PCI: dwc: Export dw_pcie_wait_for_link() API
PCI: dwc: Add extended configuration space capability search API
PCI: dwc: Move config space capability search API
PCI: dwc: Group DBI registers writes requiring unlocking
PCI: Disable MSI for Tegra root ports
PCI: Add #defines for some of PCIe spec r4.0 features
PCI: tegra: Fix OF node reference leak
36 lines
1.5 KiB
Makefile
36 lines
1.5 KiB
Makefile
# SPDX-License-Identifier: GPL-2.0
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obj-$(CONFIG_PCIE_DW) += pcie-designware.o
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obj-$(CONFIG_PCIE_DW_HOST) += pcie-designware-host.o
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obj-$(CONFIG_PCIE_DW_EP) += pcie-designware-ep.o
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obj-$(CONFIG_PCIE_DW_PLAT) += pcie-designware-plat.o
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obj-$(CONFIG_PCI_DRA7XX) += pci-dra7xx.o
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obj-$(CONFIG_PCI_EXYNOS) += pci-exynos.o
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obj-$(CONFIG_PCI_IMX6) += pci-imx6.o
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obj-$(CONFIG_PCIE_SPEAR13XX) += pcie-spear13xx.o
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obj-$(CONFIG_PCI_KEYSTONE) += pci-keystone.o
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obj-$(CONFIG_PCI_LAYERSCAPE) += pci-layerscape.o
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obj-$(CONFIG_PCI_LAYERSCAPE_EP) += pci-layerscape-ep.o
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obj-$(CONFIG_PCIE_QCOM) += pcie-qcom.o
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obj-$(CONFIG_PCIE_ARMADA_8K) += pcie-armada8k.o
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obj-$(CONFIG_PCIE_ARTPEC6) += pcie-artpec6.o
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obj-$(CONFIG_PCIE_KIRIN) += pcie-kirin.o
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obj-$(CONFIG_PCIE_HISI_STB) += pcie-histb.o
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obj-$(CONFIG_PCI_MESON) += pci-meson.o
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obj-$(CONFIG_PCIE_TEGRA194) += pcie-tegra194.o
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obj-$(CONFIG_PCIE_UNIPHIER) += pcie-uniphier.o
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# The following drivers are for devices that use the generic ACPI
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# pci_root.c driver but don't support standard ECAM config access.
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# They contain MCFG quirks to replace the generic ECAM accessors with
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# device-specific ones that are shared with the DT driver.
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# The ACPI driver is generic and should not require driver-specific
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# config options to be enabled, so we always build these drivers on
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# ARM64 and use internal ifdefs to only build the pieces we need
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# depending on whether ACPI, the DT driver, or both are enabled.
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ifdef CONFIG_PCI
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obj-$(CONFIG_ARM64) += pcie-al.o
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obj-$(CONFIG_ARM64) += pcie-hisi.o
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endif
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