Sai Chaitanya Kaveti 0c5f471d1c msm: ep_pcie: Set clock power management bit for EP ... According to PCIe spec, PCIE_CAP_CLOCK_POWER_MAN bit in LINK_CAPABILITIES_REG register should be set for EP. But it is seen as cleared after core reset. In the current driver this bit is being set but it is not taking effect. Enabling CLK_PM_EN in PCIE_ELBI_SYS_CTRL register, so that PCIE_CAP_CLOCK_POWER_MAN is set. Change-Id: I16654d5a477fa8eeaad61d6ec1dd32757627e2f9 Signed-off-by: Sai Chaitanya Kaveti <quic_skaveti@quicinc.com>		2023-07-07 11:46:00 +05:30
..
ep_pcie_com.h	msm: ep_pcie: Enable BME Deassert IRQ	2023-01-31 14:51:03 +05:30
ep_pcie_core.c	msm: ep_pcie: Set clock power management bit for EP	2023-07-07 11:46:00 +05:30
ep_pcie_dbg.c
ep_pcie_phy.c	msm: ep_pcie: Adding log for PHY version 7	2022-01-11 18:06:38 +05:30
ep_pcie_phy.h
ep_pcie.c
Makefile