d9a7f5879a
* refs/heads/tmp-874de1d: ANDROID: GKI: enable CONFIG_CPU_FREQ_STAT and more thermal configs ANDROID: ABI: Update allowed list for QCOM ANDROID: sched: add restrict vendor hook to modify load balance behavior ANDROID: GKI: Update abi_gki_aarch64_oneplus ANDROID: scs: use vmapped shadow stacks by default ANDROID: ABI: update allowed list for QCOM UPSTREAM: sched/fair/util_est: Implement faster ramp-up EWMA on utilization increases ANDROID: GKI: Update abi_gki_aarch64_exynos ANDROID: kbuild: disable GCOV with CFI ANDROID: GKI: add built-in PCIE_DW_PLAT_EP ANDROID: PCI: dwc: export symbols for ep driver ANDROID: recordmcount: avoid STT_FILE as base for mcount offset relocation ANDROID: iommu: Enable CONFIG_IOMMU_IO_PGTABLE_ARMV7S BACKPORT: FROMLIST: iommu/io-pgtable-arm-v7s: Quad lvl1 pgtable for MediaTek BACKPORT: FROMLIST: iommu/io-pgtable-arm-v7s: Add cfg as a param in some macros BACKPORT: FROMLIST: iommu/io-pgtable-arm-v7s: Extend PA34 for MediaTek BACKPORT: FROMLIST: iommu/io-pgtable-arm-v7s: Use ias to check the valid iova in unmap ANDROID: ABI: Update allowed list for QCOM ANDROID: modules: fix suspicious rcu usage Conflicts: kernel/sched/fair.c kernel/sched/features.h Change-Id: I5d8dc058a0aca2b90ca702f18f71f663af9774fc Signed-off-by: Blagovest Kolenichev <bkolenichev@codeaurora.org>
360 lines
12 KiB
C
360 lines
12 KiB
C
/* SPDX-License-Identifier: GPL-2.0 */
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#ifndef __IO_PGTABLE_H
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#define __IO_PGTABLE_H
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#include <linux/bitops.h>
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#include <linux/iommu.h>
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#include <linux/scatterlist.h>
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#define to_msm_io_pgtable_info(_cfg) \
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container_of(_cfg, struct msm_io_pgtable_info, pgtbl_cfg)
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/*
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* Public API for use by IOMMU drivers
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*/
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enum io_pgtable_fmt {
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ARM_32_LPAE_S1,
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ARM_32_LPAE_S2,
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ARM_64_LPAE_S1,
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ARM_64_LPAE_S2,
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ARM_V7S,
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ARM_MALI_LPAE,
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#ifdef CONFIG_IOMMU_IO_PGTABLE_FAST
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ARM_V8L_FAST,
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#endif
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IO_PGTABLE_NUM_FMTS,
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};
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/**
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* struct iommu_flush_ops - IOMMU callbacks for TLB and page table management.
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*
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* @tlb_flush_all: Synchronously invalidate the entire TLB context.
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* @tlb_flush_walk: Synchronously invalidate all intermediate TLB state
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* (sometimes referred to as the "walk cache") for a virtual
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* address range.
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* @tlb_flush_leaf: Synchronously invalidate all leaf TLB state for a virtual
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* address range.
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* @tlb_add_page: Optional callback to queue up leaf TLB invalidation for a
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* single page. IOMMUs that cannot batch TLB invalidation
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* operations efficiently will typically issue them here, but
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* others may decide to update the iommu_iotlb_gather structure
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* and defer the invalidation until iommu_tlb_sync() instead.
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*
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* Note that these can all be called in atomic context and must therefore
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* not block.
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*/
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struct iommu_flush_ops {
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void (*tlb_flush_all)(void *cookie);
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void (*tlb_flush_walk)(unsigned long iova, size_t size, size_t granule,
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void *cookie);
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void (*tlb_flush_leaf)(unsigned long iova, size_t size, size_t granule,
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void *cookie);
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void (*tlb_add_page)(struct iommu_iotlb_gather *gather,
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unsigned long iova, size_t granule, void *cookie);
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};
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/**
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* struct iommu_pgtable_ops - IOMMU callbacks for page table memory management.
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*
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* @alloc_pgtable: Allocate page table memory, and return a page-aligned
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* cacheable linear mapping address of the start of a physically
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* contiguous region of memory.
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* @free_pgtable: Free page table memory.
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*/
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struct iommu_pgtable_ops {
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void *(*alloc_pgtable)(void *cookie, int order, gfp_t gfp_mask);
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void (*free_pgtable)(void *cookie, void *virt, int order);
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};
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/**
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* struct io_pgtable_cfg - Configuration data for a set of page tables.
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*
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* @quirks: A bitmap of hardware quirks that require some special
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* action by the low-level page table allocator.
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* @pgsize_bitmap: A bitmap of page sizes supported by this set of page
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* tables.
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* @ias: Input address (iova) size, in bits.
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* @oas: Output address (paddr) size, in bits.
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* @coherent_walk A flag to indicate whether or not page table walks made
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* by the IOMMU are coherent with the CPU caches.
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* @tlb: TLB management callbacks for this set of tables.
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* @iommu_pgtable_ops: IOMMU page table memory management callbacks (optional;
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* defaults to the buddy allocator if not present).
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* @iommu_dev: The device representing the DMA configuration for the
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* page table walker.
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*/
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struct io_pgtable_cfg {
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/*
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* IO_PGTABLE_QUIRK_ARM_NS: (ARM formats) Set NS and NSTABLE bits in
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* stage 1 PTEs, for hardware which insists on validating them
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* even in non-secure state where they should normally be ignored.
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*
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* IO_PGTABLE_QUIRK_NO_PERMS: Ignore the IOMMU_READ, IOMMU_WRITE and
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* IOMMU_NOEXEC flags and map everything with full access, for
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* hardware which does not implement the permissions of a given
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* format, and/or requires some format-specific default value.
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*
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* IO_PGTABLE_QUIRK_TLBI_ON_MAP: If the format forbids caching invalid
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* (unmapped) entries but the hardware might do so anyway, perform
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* TLB maintenance when mapping as well as when unmapping.
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*
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* IO_PGTABLE_QUIRK_ARM_MTK_EXT: (ARM v7s format) MediaTek IOMMUs extend
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* to support up to 35 bits PA where the bit32, bit33 and bit34 are
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* encoded in the bit9, bit4 and bit5 of the PTE respectively.
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*
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* IO_PGTABLE_QUIRK_NON_STRICT: Skip issuing synchronous leaf TLBIs
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* on unmap, for DMA domains using the flush queue mechanism for
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* delayed invalidation.
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*
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* IO_PGTABLE_QUIRK_QCOM_USE_UPSTREAM_HINT: Override the attributes
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* set in TCR for the page table walker. Use attributes specified
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* by the upstream hw instead.
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*
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* IO_PGTABLE_QUIRK_QCOM_USE_LLC_NWA: Override the attributes
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* set in TCR for the page table walker with Write-Back,
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* no Write-Allocate cacheable encoding.
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*
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*/
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#define IO_PGTABLE_QUIRK_ARM_NS BIT(0)
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#define IO_PGTABLE_QUIRK_NO_PERMS BIT(1)
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#define IO_PGTABLE_QUIRK_TLBI_ON_MAP BIT(2)
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#define IO_PGTABLE_QUIRK_ARM_MTK_EXT BIT(3)
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#define IO_PGTABLE_QUIRK_NON_STRICT BIT(4)
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#define IO_PGTABLE_QUIRK_QCOM_USE_UPSTREAM_HINT BIT(5)
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#define IO_PGTABLE_QUIRK_QCOM_USE_LLC_NWA BIT(6)
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unsigned long quirks;
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unsigned long pgsize_bitmap;
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unsigned int ias;
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unsigned int oas;
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bool coherent_walk;
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const struct iommu_flush_ops *tlb;
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const struct iommu_pgtable_ops *iommu_pgtable_ops;
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struct device *iommu_dev;
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/* Low-level data specific to the table format */
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union {
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struct {
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u64 ttbr[2];
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u64 tcr;
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u64 mair[2];
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} arm_lpae_s1_cfg;
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struct {
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u64 vttbr;
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u64 vtcr;
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} arm_lpae_s2_cfg;
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struct {
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u32 ttbr[2];
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u32 tcr;
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u32 nmrr;
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u32 prrr;
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} arm_v7s_cfg;
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struct {
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u64 transtab;
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u64 memattr;
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} arm_mali_lpae_cfg;
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};
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};
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/**
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* struct io_pgtable_ops - Page table manipulation API for IOMMU drivers.
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*
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* @map: Map a physically contiguous memory region.
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* @unmap: Unmap a physically contiguous memory region.
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* @iova_to_phys: Translate iova to physical address.
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*
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* These functions map directly onto the iommu_ops member functions with
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* the same names.
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*/
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struct io_pgtable_ops {
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int (*map)(struct io_pgtable_ops *ops, unsigned long iova,
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phys_addr_t paddr, size_t size, int prot);
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size_t (*unmap)(struct io_pgtable_ops *ops, unsigned long iova,
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size_t size, struct iommu_iotlb_gather *gather);
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phys_addr_t (*iova_to_phys)(struct io_pgtable_ops *ops,
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unsigned long iova);
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};
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/**
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* struct msm_io_pgtable_info - MSM specific page table manipulation API for
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* IOMMU drivers, and page table configuration.
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*
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* @map_sg: Map a scatterlist. Returns the number of bytes mapped,
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* or -ve val on failure. The size parameter contains the
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* size of the partial mapping in case of failure.
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* @is_iova_coherent: Checks coherency of given IOVA. Returns True if coherent
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* and False if non-coherent.
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* @iova_to_pte: Translate iova to Page Table Entry (PTE).
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* @pgtbl_cfg: The configuration for a set of page tables.
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* @iova_base: Configured IOVA base
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* @iova_end: Configured IOVA end
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*/
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struct msm_io_pgtable_info {
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int (*map_sg)(struct io_pgtable_ops *ops, unsigned long iova,
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struct scatterlist *sg, unsigned int nents, int prot,
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size_t *size);
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bool (*is_iova_coherent)(struct io_pgtable_ops *ops,
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unsigned long iova);
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uint64_t (*iova_to_pte)(struct io_pgtable_ops *ops, unsigned long iova);
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struct io_pgtable_cfg pgtbl_cfg;
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dma_addr_t iova_base;
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dma_addr_t iova_end;
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};
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/**
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* alloc_io_pgtable_ops() - Allocate a page table allocator for use by an IOMMU.
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*
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* @fmt: The page table format.
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* @cfg: The page table configuration. This will be modified to represent
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* the configuration actually provided by the allocator (e.g. the
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* pgsize_bitmap may be restricted).
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* @cookie: An opaque token provided by the IOMMU driver and passed back to
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* the callback routines in cfg->tlb.
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*/
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struct io_pgtable_ops *alloc_io_pgtable_ops(enum io_pgtable_fmt fmt,
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struct io_pgtable_cfg *cfg,
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void *cookie);
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/**
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* free_io_pgtable_ops() - Free an io_pgtable_ops structure. The caller
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* *must* ensure that the page table is no longer
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* live, but the TLB can be dirty.
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*
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* @ops: The ops returned from alloc_io_pgtable_ops.
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*/
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void free_io_pgtable_ops(struct io_pgtable_ops *ops);
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/**
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* io_pgtable_alloc_pages - Allocate memory for page tables using an IOMMU
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* driver's provided callback, or the buddy allocator.
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*
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* @cfg: The page table configuration. This will be used to determine if
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* the page table memory should be allocated through the IOMMU
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* driver's callback, or the buddy allocator.
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* @cookie: An opaque pointer used by the IOMMU driver's callback.
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* @order: The order of the size of the allocation.
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* @gfp_mask: The GFP mask to be used with the allocation
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*
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* Returns a cacheable linear mapping address to a physically contiguous region
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* of memory. The start of the region must be page-aligned.
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*/
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void *io_pgtable_alloc_pages(struct io_pgtable_cfg *cfg, void *cookie,
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int order, gfp_t gfp_mask);
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/**
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* io_pgtable_free_pages - Free memory for page tables using an IOMMU
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* driver's provided callback, or the buddy allocator.
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*
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* @cfg: The page table configuration. This will be used to determine if
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* the page table memory should be allocated through the IOMMU
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* driver's callback, or the buddy allocator.
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* @cookie: An opage pointer used by the IOMMU driver's callback.
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* @virt: The virtual address of the memory to free.
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* @order: The order of the size of the allocation.
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*/
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void io_pgtable_free_pages(struct io_pgtable_cfg *cfg, void *cookie, void *virt,
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int order);
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/*
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* Internal structures for page table allocator implementations.
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*/
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/**
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* struct io_pgtable - Internal structure describing a set of page tables.
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*
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* @fmt: The page table format.
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* @cookie: An opaque token provided by the IOMMU driver and passed back to
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* any callback routines.
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* @cfg: A copy of the page table configuration.
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* @ops: The page table operations in use for this set of page tables.
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*/
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struct io_pgtable {
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enum io_pgtable_fmt fmt;
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void *cookie;
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struct io_pgtable_cfg cfg;
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struct io_pgtable_ops ops;
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};
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#define io_pgtable_ops_to_pgtable(x) container_of((x), struct io_pgtable, ops)
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static inline void io_pgtable_tlb_flush_all(struct io_pgtable *iop)
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{
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if (!iop->cfg.tlb)
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return;
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iop->cfg.tlb->tlb_flush_all(iop->cookie);
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}
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static inline void
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io_pgtable_tlb_flush_walk(struct io_pgtable *iop, unsigned long iova,
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size_t size, size_t granule)
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{
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iop->cfg.tlb->tlb_flush_walk(iova, size, granule, iop->cookie);
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}
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static inline void
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io_pgtable_tlb_flush_leaf(struct io_pgtable *iop, unsigned long iova,
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size_t size, size_t granule)
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{
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iop->cfg.tlb->tlb_flush_leaf(iova, size, granule, iop->cookie);
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}
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static inline void
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io_pgtable_tlb_add_page(struct io_pgtable *iop,
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struct iommu_iotlb_gather * gather, unsigned long iova,
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size_t granule)
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{
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if (iop->cfg.tlb->tlb_add_page)
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iop->cfg.tlb->tlb_add_page(gather, iova, granule, iop->cookie);
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}
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/**
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* struct io_pgtable_init_fns - Alloc/free a set of page tables for a
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* particular format.
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*
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* @alloc: Allocate a set of page tables described by cfg.
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* @free: Free the page tables associated with iop.
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*/
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struct io_pgtable_init_fns {
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struct io_pgtable *(*alloc)(struct io_pgtable_cfg *cfg, void *cookie);
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void (*free)(struct io_pgtable *iop);
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};
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extern struct io_pgtable_init_fns io_pgtable_arm_32_lpae_s1_init_fns;
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extern struct io_pgtable_init_fns io_pgtable_arm_32_lpae_s2_init_fns;
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extern struct io_pgtable_init_fns io_pgtable_arm_64_lpae_s1_init_fns;
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extern struct io_pgtable_init_fns io_pgtable_arm_64_lpae_s2_init_fns;
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extern struct io_pgtable_init_fns io_pgtable_arm_v7s_init_fns;
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extern struct io_pgtable_init_fns io_pgtable_arm_mali_lpae_init_fns;
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#ifdef CONFIG_IOMMU_IO_PGTABLE_FAST
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extern struct io_pgtable_init_fns io_pgtable_av8l_fast_init_fns;
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#endif
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/**
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* io_pgtable_alloc_pages_exact:
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* allocate an exact number of physically-contiguous pages.
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* @size: the number of bytes to allocate
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* @gfp_mask: GFP flags for the allocation
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*
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* Like alloc_pages_exact(), but with some additional accounting for debug
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* purposes.
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*/
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void *io_pgtable_alloc_pages_exact(struct io_pgtable_cfg *cfg, void *cookie,
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size_t size, gfp_t gfp_mask);
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/**
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* io_pgtable_free_pages_exact:
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* release memory allocated via io_pgtable_alloc_pages_exact()
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* @virt: the value returned by alloc_pages_exact.
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* @size: size of allocation, same value as passed to alloc_pages_exact().
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*
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* Like free_pages_exact(), but with some additional accounting for debug
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* purposes.
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*/
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void io_pgtable_free_pages_exact(struct io_pgtable_cfg *cfg, void *cookie,
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void *virt, size_t size);
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#endif /* __IO_PGTABLE_H */
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