0124532c0e
"LA.UM.9.14.1.r1-10900-QCM6490.QSSI14.0" * tag 'LA.UM.9.14.1.r1-10900-QCM6490.QSSI14.0' of https://git.codelinaro.org/clo/la/platform/vendor/opensource/display-drivers: disp: msm: dp: fix compilation errors Revert "disp: msm: dp: skip hpd config" disp: msm: dp: wait for resources init in case of cont splash disp: msm: sde: Remove pm vote at time of handoff disp: msm: eDP continuous splash implementation disp: msm: dp: add backlight for edp disp: msm: dp: skip hpd config disp: msm: edp continuous splash implementation disp: msm: dp: add eDP panel notifier support disp: msm: dp: add eDP panel notifier support disp: msm: dp: add pinctrl state for backlight pwm drm/msm/dp: add support to multiple dp instances disp: msm: dp: move fsa init from dp probe to dp hotplug disp: msm: sde: update sde interrupt map disp: msm: dp: update pll and catalog sequence disp: msm: dp: Convert clock operations to byte2 ops disp: msm: dp: Masking interrupt for eDP disp: msm: dp: add support for eDP display disp: msm: dp: add eDP support as a primary display disp: msm: dp: Support DP display as primary disp: msm: dp: add pixel base offset support in device tree disp: msm: dp: add 7nm eDP PHY support disp: msm: dp: add files for 7nm eDP PHY Change-Id: I614c52764b1479b90bd5a603828b5dff7e6c83db
65 lines
2.0 KiB
C
65 lines
2.0 KiB
C
/* SPDX-License-Identifier: GPL-2.0-only */
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/*
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* Copyright (c) 2023 Qualcomm Innovation Center, Inc. All rights reserved.
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* Copyright (c) 2012-2020, The Linux Foundation. All rights reserved.
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*/
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#ifndef _DP_AUX_H_
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#define _DP_AUX_H_
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#include "dp_catalog.h"
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#include "drm_dp_helper.h"
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#define DP_STATE_NOTIFICATION_SENT BIT(0)
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#define DP_STATE_TRAIN_1_STARTED BIT(1)
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#define DP_STATE_TRAIN_1_SUCCEEDED BIT(2)
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#define DP_STATE_TRAIN_1_FAILED BIT(3)
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#define DP_STATE_TRAIN_2_STARTED BIT(4)
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#define DP_STATE_TRAIN_2_SUCCEEDED BIT(5)
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#define DP_STATE_TRAIN_2_FAILED BIT(6)
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#define DP_STATE_CTRL_POWERED_ON BIT(7)
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#define DP_STATE_CTRL_POWERED_OFF BIT(8)
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#define DP_STATE_LINK_MAINTENANCE_STARTED BIT(9)
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#define DP_STATE_LINK_MAINTENANCE_COMPLETED BIT(10)
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#define DP_STATE_LINK_MAINTENANCE_FAILED BIT(11)
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#define DP_STATE_AUX_TIMEOUT BIT(12)
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#define DP_STATE_PLL_LOCKED BIT(13)
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enum dp_aux_error {
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DP_AUX_ERR_NONE = 0,
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DP_AUX_ERR_ADDR = -1,
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DP_AUX_ERR_TOUT = -2,
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DP_AUX_ERR_NACK = -3,
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DP_AUX_ERR_DEFER = -4,
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DP_AUX_ERR_NACK_DEFER = -5,
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DP_AUX_ERR_PHY = -6,
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};
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struct dp_aux {
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u32 reg;
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u32 size;
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u32 state;
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bool read;
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struct mutex *access_lock;
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struct drm_dp_aux *drm_aux;
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int (*drm_aux_register)(struct dp_aux *aux);
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void (*drm_aux_deregister)(struct dp_aux *aux);
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void (*isr)(struct dp_aux *aux);
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void (*init)(struct dp_aux *aux, struct dp_aux_cfg *aux_cfg, bool skip_op);
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void (*deinit)(struct dp_aux *aux);
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void (*reconfig)(struct dp_aux *aux);
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void (*abort)(struct dp_aux *aux, bool abort);
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void (*dpcd_updated)(struct dp_aux *aux);
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void (*set_sim_mode)(struct dp_aux *aux, bool en, u8 *edid, u8 *dpcd);
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int (*aux_switch)(struct dp_aux *aux, bool enable, int orientation);
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};
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struct dp_aux *dp_aux_get(struct device *dev, struct dp_catalog_aux *catalog,
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struct dp_parser *parser, struct device_node *aux_switch);
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void dp_aux_put(struct dp_aux *aux);
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#endif /*__DP_AUX_H_*/
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