4b210faf09
Align the code to the start of the next cache line, rather than the start of the next 256-byte page. (On i386 and ARM, the ".align" assembler directive takes its first argument as the number of low-order bits that must be zero, not the number of words comprising a cache line.) Supercedes patch 4166. Signed-off-by: Matt Reimer <mreimer@vpop.net> Acked-by: Ben Dooks <ben-linux@fluff.org> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
69 lines
2.1 KiB
ArmAsm
69 lines
2.1 KiB
ArmAsm
/* linux/arch/arm/mach-s3c2410/s3c2410-sleep.S
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*
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* Copyright (c) 2004 Simtec Electronics
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* Ben Dooks <ben@simtec.co.uk>
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*
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* S3C2410 Power Manager (Suspend-To-RAM) support
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*
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* Based on PXA/SA1100 sleep code by:
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* Nicolas Pitre, (c) 2002 Monta Vista Software Inc
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* Cliff Brake, (c) 2001
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation; either version 2 of the License, or
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* (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, write to the Free Software
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* Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
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*/
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#include <linux/linkage.h>
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#include <asm/assembler.h>
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#include <asm/hardware.h>
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#include <asm/arch/map.h>
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#include <asm/arch/regs-gpio.h>
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#include <asm/arch/regs-clock.h>
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#include <asm/arch/regs-mem.h>
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#include <asm/arch/regs-serial.h>
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/* s3c2410_cpu_suspend
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*
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* put the cpu into sleep mode
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*/
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ENTRY(s3c2410_cpu_suspend)
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@@ prepare cpu to sleep
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ldr r4, =S3C2410_REFRESH
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ldr r5, =S3C24XX_MISCCR
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ldr r6, =S3C2410_CLKCON
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ldr r7, [ r4 ] @ get REFRESH (and ensure in TLB)
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ldr r8, [ r5 ] @ get MISCCR (and ensure in TLB)
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ldr r9, [ r6 ] @ get CLKCON (and ensure in TLB)
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orr r7, r7, #S3C2410_REFRESH_SELF @ SDRAM sleep command
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orr r8, r8, #S3C2410_MISCCR_SDSLEEP @ SDRAM power-down signals
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orr r9, r9, #S3C2410_CLKCON_POWER @ power down command
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teq pc, #0 @ first as a trial-run to load cache
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bl s3c2410_do_sleep
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teq r0, r0 @ now do it for real
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b s3c2410_do_sleep @
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@@ align next bit of code to cache line
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.align 5
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s3c2410_do_sleep:
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streq r7, [ r4 ] @ SDRAM sleep command
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streq r8, [ r5 ] @ SDRAM power-down config
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streq r9, [ r6 ] @ CPU sleep
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1: beq 1b
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mov pc, r14
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