3668b45d46
* architecture specific details are handled in asm/arch/time.h * ARCH_IOP13XX now selects PLAT_IOP * as suggested by Lennert use ifdef CONFIG_XSCALE to skip the cp_wait on XSC3 Signed-off-by: Dan Williams <dan.j.williams@intel.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
103 lines
2.3 KiB
C
103 lines
2.3 KiB
C
/*
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* arch/arm/plat-iop/time.c
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*
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* Timer code for IOP32x and IOP33x based systems
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*
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* Author: Deepak Saxena <dsaxena@mvista.com>
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*
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* Copyright 2002-2003 MontaVista Software Inc.
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*
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* This program is free software; you can redistribute it and/or modify it
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* under the terms of the GNU General Public License as published by the
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* Free Software Foundation; either version 2 of the License, or (at your
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* option) any later version.
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*/
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#include <linux/kernel.h>
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#include <linux/interrupt.h>
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#include <linux/time.h>
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#include <linux/init.h>
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#include <linux/timex.h>
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#include <asm/hardware.h>
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#include <asm/io.h>
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#include <asm/irq.h>
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#include <asm/uaccess.h>
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#include <asm/mach/irq.h>
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#include <asm/mach/time.h>
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#include <asm/arch/time.h>
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static unsigned long ticks_per_jiffy;
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static unsigned long ticks_per_usec;
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static unsigned long next_jiffy_time;
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unsigned long iop_gettimeoffset(void)
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{
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unsigned long offset, temp1, temp2;
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/* enable cp6, if necessary, to avoid taking the overhead of an
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* undefined instruction trap
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*/
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asm volatile (
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"mrc p15, 0, %0, c15, c1, 0\n\t"
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"ands %1, %0, #(1 << 6)\n\t"
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"orreq %0, %0, #(1 << 6)\n\t"
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"mcreq p15, 0, %0, c15, c1, 0\n\t"
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#ifdef CONFIG_XSCALE
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"mrceq p15, 0, %0, c15, c1, 0\n\t"
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"moveq %0, %0\n\t"
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"subeq pc, pc, #4\n\t"
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#endif
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: "=r"(temp1), "=r"(temp2) : : "cc");
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offset = next_jiffy_time - read_tcr1();
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return offset / ticks_per_usec;
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}
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static irqreturn_t
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iop_timer_interrupt(int irq, void *dev_id)
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{
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write_seqlock(&xtime_lock);
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write_tisr(1);
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while ((signed long)(next_jiffy_time - read_tcr1())
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>= ticks_per_jiffy) {
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timer_tick();
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next_jiffy_time -= ticks_per_jiffy;
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}
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write_sequnlock(&xtime_lock);
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return IRQ_HANDLED;
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}
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static struct irqaction iop_timer_irq = {
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.name = "IOP Timer Tick",
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.handler = iop_timer_interrupt,
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.flags = IRQF_DISABLED | IRQF_TIMER,
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};
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void __init iop_init_time(unsigned long tick_rate)
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{
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u32 timer_ctl;
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ticks_per_jiffy = (tick_rate + HZ/2) / HZ;
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ticks_per_usec = tick_rate / 1000000;
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next_jiffy_time = 0xffffffff;
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timer_ctl = IOP_TMR_EN | IOP_TMR_PRIVILEGED |
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IOP_TMR_RELOAD | IOP_TMR_RATIO_1_1;
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/*
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* We use timer 0 for our timer interrupt, and timer 1 as
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* monotonic counter for tracking missed jiffies.
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*/
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write_trr0(ticks_per_jiffy - 1);
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write_tmr0(timer_ctl);
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write_trr1(0xffffffff);
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write_tmr1(timer_ctl);
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setup_irq(IRQ_IOP_TIMER0, &iop_timer_irq);
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}
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