0c3bd83b09
After the common MIPS CPU interrupt controller (for irq0-7) was introduced the Lasat boards didn't get their interrupts right, so nothing worked. The old routines need to be offset by the new 8 hardware interrupts common to all MIPS CPU's. Signed-off-by: Thomas Horsten <thomas@horsten.com> Signed-off-by: Ralf Baechle <ralf@linux-mips.org> |
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| .. | ||
| ds1603.h | ||
| eeprom.h | ||
| head.h | ||
| lasat.h | ||
| lasatint.h | ||
| picvue.h | ||
| serial.h | ||