04cc8cacb0
Add infrastructure for auto-negotiation of speed, duplex and flow control. When using 10Xpress, auto-negotiate flow control. While we're at it, clean up the code to warn when partner is not 10GBASE-T capable. Signed-off-by: Ben Hutchings <bhutchings@solarflare.com> Signed-off-by: David S. Miller <davem@davemloft.net>
473 lines
13 KiB
C
473 lines
13 KiB
C
/****************************************************************************
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* Driver for Solarflare Solarstorm network controllers and boards
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* Copyright 2007-2008 Solarflare Communications Inc.
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*
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* This program is free software; you can redistribute it and/or modify it
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* under the terms of the GNU General Public License version 2 as published
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* by the Free Software Foundation, incorporated herein by reference.
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*/
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#include <linux/delay.h>
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#include <linux/seq_file.h>
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#include "efx.h"
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#include "mdio_10g.h"
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#include "falcon.h"
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#include "phy.h"
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#include "falcon_hwdefs.h"
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#include "boards.h"
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/* We expect these MMDs to be in the package */
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#define TENXPRESS_REQUIRED_DEVS (MDIO_MMDREG_DEVS_PMAPMD | \
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MDIO_MMDREG_DEVS_PCS | \
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MDIO_MMDREG_DEVS_PHYXS | \
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MDIO_MMDREG_DEVS_AN)
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#define TENXPRESS_LOOPBACKS ((1 << LOOPBACK_PHYXS) | \
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(1 << LOOPBACK_PCS) | \
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(1 << LOOPBACK_PMAPMD) | \
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(1 << LOOPBACK_NETWORK))
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/* We complain if we fail to see the link partner as 10G capable this many
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* times in a row (must be > 1 as sampling the autoneg. registers is racy)
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*/
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#define MAX_BAD_LP_TRIES (5)
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/* Extended control register */
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#define PMA_PMD_XCONTROL_REG 0xc000
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#define PMA_PMD_LNPGA_POWERDOWN_LBN 8
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#define PMA_PMD_LNPGA_POWERDOWN_WIDTH 1
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/* extended status register */
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#define PMA_PMD_XSTATUS_REG 0xc001
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#define PMA_PMD_XSTAT_FLP_LBN (12)
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/* LED control register */
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#define PMA_PMD_LED_CTRL_REG (0xc007)
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#define PMA_PMA_LED_ACTIVITY_LBN (3)
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/* LED function override register */
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#define PMA_PMD_LED_OVERR_REG (0xc009)
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/* Bit positions for different LEDs (there are more but not wired on SFE4001)*/
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#define PMA_PMD_LED_LINK_LBN (0)
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#define PMA_PMD_LED_SPEED_LBN (2)
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#define PMA_PMD_LED_TX_LBN (4)
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#define PMA_PMD_LED_RX_LBN (6)
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/* Override settings */
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#define PMA_PMD_LED_AUTO (0) /* H/W control */
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#define PMA_PMD_LED_ON (1)
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#define PMA_PMD_LED_OFF (2)
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#define PMA_PMD_LED_FLASH (3)
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#define PMA_PMD_LED_MASK 3
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/* All LEDs under hardware control */
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#define PMA_PMD_LED_FULL_AUTO (0)
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/* Green and Amber under hardware control, Red off */
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#define PMA_PMD_LED_DEFAULT (PMA_PMD_LED_OFF << PMA_PMD_LED_RX_LBN)
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/* Special Software reset register */
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#define PMA_PMD_EXT_CTRL_REG 49152
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#define PMA_PMD_EXT_SSR_LBN 15
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/* Misc register defines */
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#define PCS_CLOCK_CTRL_REG 0xd801
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#define PLL312_RST_N_LBN 2
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#define PCS_SOFT_RST2_REG 0xd806
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#define SERDES_RST_N_LBN 13
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#define XGXS_RST_N_LBN 12
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#define PCS_TEST_SELECT_REG 0xd807 /* PRM 10.5.8 */
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#define CLK312_EN_LBN 3
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/* PHYXS registers */
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#define PHYXS_TEST1 (49162)
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#define LOOPBACK_NEAR_LBN (8)
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#define LOOPBACK_NEAR_WIDTH (1)
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/* Boot status register */
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#define PCS_BOOT_STATUS_REG (0xd000)
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#define PCS_BOOT_FATAL_ERR_LBN (0)
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#define PCS_BOOT_PROGRESS_LBN (1)
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#define PCS_BOOT_PROGRESS_WIDTH (2)
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#define PCS_BOOT_COMPLETE_LBN (3)
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#define PCS_BOOT_MAX_DELAY (100)
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#define PCS_BOOT_POLL_DELAY (10)
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/* Time to wait between powering down the LNPGA and turning off the power
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* rails */
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#define LNPGA_PDOWN_WAIT (HZ / 5)
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static int crc_error_reset_threshold = 100;
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module_param(crc_error_reset_threshold, int, 0644);
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MODULE_PARM_DESC(crc_error_reset_threshold,
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"Max number of CRC errors before XAUI reset");
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struct tenxpress_phy_data {
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enum efx_loopback_mode loopback_mode;
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atomic_t bad_crc_count;
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enum efx_phy_mode phy_mode;
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int bad_lp_tries;
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};
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void tenxpress_crc_err(struct efx_nic *efx)
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{
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struct tenxpress_phy_data *phy_data = efx->phy_data;
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if (phy_data != NULL)
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atomic_inc(&phy_data->bad_crc_count);
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}
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/* Check that the C166 has booted successfully */
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static int tenxpress_phy_check(struct efx_nic *efx)
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{
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int phy_id = efx->mii.phy_id;
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int count = PCS_BOOT_MAX_DELAY / PCS_BOOT_POLL_DELAY;
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int boot_stat;
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/* Wait for the boot to complete (or not) */
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while (count) {
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boot_stat = mdio_clause45_read(efx, phy_id,
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MDIO_MMD_PCS,
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PCS_BOOT_STATUS_REG);
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if (boot_stat & (1 << PCS_BOOT_COMPLETE_LBN))
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break;
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count--;
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udelay(PCS_BOOT_POLL_DELAY);
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}
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if (!count) {
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EFX_ERR(efx, "%s: PHY boot timed out. Last status "
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"%x\n", __func__,
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(boot_stat >> PCS_BOOT_PROGRESS_LBN) &
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((1 << PCS_BOOT_PROGRESS_WIDTH) - 1));
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return -ETIMEDOUT;
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}
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return 0;
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}
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static int tenxpress_init(struct efx_nic *efx)
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{
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int rc, reg;
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/* Turn on the clock */
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reg = (1 << CLK312_EN_LBN);
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mdio_clause45_write(efx, efx->mii.phy_id,
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MDIO_MMD_PCS, PCS_TEST_SELECT_REG, reg);
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rc = tenxpress_phy_check(efx);
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if (rc < 0)
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return rc;
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/* Set the LEDs up as: Green = Link, Amber = Link/Act, Red = Off */
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reg = mdio_clause45_read(efx, efx->mii.phy_id,
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MDIO_MMD_PMAPMD, PMA_PMD_LED_CTRL_REG);
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reg |= (1 << PMA_PMA_LED_ACTIVITY_LBN);
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mdio_clause45_write(efx, efx->mii.phy_id, MDIO_MMD_PMAPMD,
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PMA_PMD_LED_CTRL_REG, reg);
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reg = PMA_PMD_LED_DEFAULT;
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mdio_clause45_write(efx, efx->mii.phy_id, MDIO_MMD_PMAPMD,
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PMA_PMD_LED_OVERR_REG, reg);
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return rc;
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}
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static int tenxpress_phy_init(struct efx_nic *efx)
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{
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struct tenxpress_phy_data *phy_data;
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int rc = 0;
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phy_data = kzalloc(sizeof(*phy_data), GFP_KERNEL);
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if (!phy_data)
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return -ENOMEM;
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efx->phy_data = phy_data;
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phy_data->phy_mode = efx->phy_mode;
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rc = mdio_clause45_wait_reset_mmds(efx,
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TENXPRESS_REQUIRED_DEVS);
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if (rc < 0)
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goto fail;
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rc = mdio_clause45_check_mmds(efx, TENXPRESS_REQUIRED_DEVS, 0);
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if (rc < 0)
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goto fail;
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rc = tenxpress_init(efx);
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if (rc < 0)
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goto fail;
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schedule_timeout_uninterruptible(HZ / 5); /* 200ms */
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/* Let XGXS and SerDes out of reset and resets 10XPress */
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falcon_reset_xaui(efx);
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return 0;
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fail:
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kfree(efx->phy_data);
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efx->phy_data = NULL;
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return rc;
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}
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static int tenxpress_special_reset(struct efx_nic *efx)
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{
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int rc, reg;
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/* The XGMAC clock is driven from the SFC7101/SFT9001 312MHz clock, so
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* a special software reset can glitch the XGMAC sufficiently for stats
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* requests to fail. Since we don't ofen special_reset, just lock. */
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spin_lock(&efx->stats_lock);
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/* Initiate reset */
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reg = mdio_clause45_read(efx, efx->mii.phy_id,
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MDIO_MMD_PMAPMD, PMA_PMD_EXT_CTRL_REG);
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reg |= (1 << PMA_PMD_EXT_SSR_LBN);
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mdio_clause45_write(efx, efx->mii.phy_id, MDIO_MMD_PMAPMD,
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PMA_PMD_EXT_CTRL_REG, reg);
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mdelay(200);
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/* Wait for the blocks to come out of reset */
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rc = mdio_clause45_wait_reset_mmds(efx,
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TENXPRESS_REQUIRED_DEVS);
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if (rc < 0)
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goto unlock;
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/* Try and reconfigure the device */
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rc = tenxpress_init(efx);
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if (rc < 0)
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goto unlock;
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unlock:
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spin_unlock(&efx->stats_lock);
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return rc;
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}
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static void tenxpress_check_bad_lp(struct efx_nic *efx, bool link_ok)
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{
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struct tenxpress_phy_data *pd = efx->phy_data;
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int phy_id = efx->mii.phy_id;
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bool bad_lp;
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int reg;
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if (link_ok) {
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bad_lp = false;
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} else {
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/* Check that AN has started but not completed. */
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reg = mdio_clause45_read(efx, phy_id, MDIO_MMD_AN,
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MDIO_AN_STATUS);
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if (!(reg & (1 << MDIO_AN_STATUS_LP_AN_CAP_LBN)))
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return; /* LP status is unknown */
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bad_lp = !(reg & (1 << MDIO_AN_STATUS_AN_DONE_LBN));
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if (bad_lp)
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pd->bad_lp_tries++;
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}
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/* Nothing to do if all is well and was previously so. */
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if (!pd->bad_lp_tries)
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return;
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/* Use the RX (red) LED as an error indicator once we've seen AN
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* failure several times in a row, and also log a message. */
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if (!bad_lp || pd->bad_lp_tries == MAX_BAD_LP_TRIES) {
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reg = mdio_clause45_read(efx, phy_id, MDIO_MMD_PMAPMD,
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PMA_PMD_LED_OVERR_REG);
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reg &= ~(PMA_PMD_LED_MASK << PMA_PMD_LED_RX_LBN);
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if (!bad_lp) {
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reg |= PMA_PMD_LED_OFF << PMA_PMD_LED_RX_LBN;
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} else {
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reg |= PMA_PMD_LED_FLASH << PMA_PMD_LED_RX_LBN;
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EFX_ERR(efx, "appears to be plugged into a port"
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" that is not 10GBASE-T capable. The PHY"
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" supports 10GBASE-T ONLY, so no link can"
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" be established\n");
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}
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mdio_clause45_write(efx, phy_id, MDIO_MMD_PMAPMD,
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PMA_PMD_LED_OVERR_REG, reg);
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pd->bad_lp_tries = bad_lp;
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}
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}
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static bool tenxpress_link_ok(struct efx_nic *efx)
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{
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if (efx->loopback_mode == LOOPBACK_NONE)
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return mdio_clause45_links_ok(efx, MDIO_MMDREG_DEVS_AN);
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else
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return mdio_clause45_links_ok(efx,
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MDIO_MMDREG_DEVS_PMAPMD |
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MDIO_MMDREG_DEVS_PCS |
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MDIO_MMDREG_DEVS_PHYXS);
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}
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static void tenxpress_phyxs_loopback(struct efx_nic *efx)
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{
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int phy_id = efx->mii.phy_id;
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int ctrl1, ctrl2;
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ctrl1 = ctrl2 = mdio_clause45_read(efx, phy_id, MDIO_MMD_PHYXS,
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PHYXS_TEST1);
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if (efx->loopback_mode == LOOPBACK_PHYXS)
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ctrl2 |= (1 << LOOPBACK_NEAR_LBN);
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else
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ctrl2 &= ~(1 << LOOPBACK_NEAR_LBN);
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if (ctrl1 != ctrl2)
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mdio_clause45_write(efx, phy_id, MDIO_MMD_PHYXS,
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PHYXS_TEST1, ctrl2);
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}
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static void tenxpress_phy_reconfigure(struct efx_nic *efx)
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{
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struct tenxpress_phy_data *phy_data = efx->phy_data;
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bool loop_change = LOOPBACK_OUT_OF(phy_data, efx,
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TENXPRESS_LOOPBACKS);
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if (efx->phy_mode & PHY_MODE_SPECIAL) {
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phy_data->phy_mode = efx->phy_mode;
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return;
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}
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/* When coming out of transmit disable, coming out of low power
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* mode, or moving out of any PHY internal loopback mode,
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* perform a special software reset */
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if ((efx->phy_mode == PHY_MODE_NORMAL &&
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phy_data->phy_mode != PHY_MODE_NORMAL) ||
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loop_change) {
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tenxpress_special_reset(efx);
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falcon_reset_xaui(efx);
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}
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mdio_clause45_transmit_disable(efx);
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mdio_clause45_phy_reconfigure(efx);
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tenxpress_phyxs_loopback(efx);
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phy_data->loopback_mode = efx->loopback_mode;
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phy_data->phy_mode = efx->phy_mode;
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efx->link_up = tenxpress_link_ok(efx);
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efx->link_speed = 10000;
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efx->link_fd = true;
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efx->link_fc = mdio_clause45_get_pause(efx);
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}
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static void tenxpress_phy_clear_interrupt(struct efx_nic *efx)
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{
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/* Nothing done here - LASI interrupts aren't reliable so poll */
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}
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/* Poll PHY for interrupt */
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static int tenxpress_phy_check_hw(struct efx_nic *efx)
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{
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struct tenxpress_phy_data *phy_data = efx->phy_data;
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bool link_ok;
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int rc = 0;
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link_ok = tenxpress_link_ok(efx);
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tenxpress_check_bad_lp(efx, link_ok);
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if (link_ok != efx->link_up)
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falcon_sim_phy_event(efx);
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if (phy_data->phy_mode != PHY_MODE_NORMAL)
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return 0;
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if (atomic_read(&phy_data->bad_crc_count) > crc_error_reset_threshold) {
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EFX_ERR(efx, "Resetting XAUI due to too many CRC errors\n");
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falcon_reset_xaui(efx);
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atomic_set(&phy_data->bad_crc_count, 0);
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}
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rc = efx->board_info.monitor(efx);
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if (rc) {
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EFX_ERR(efx, "Board sensor %s; shutting down PHY\n",
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(rc == -ERANGE) ? "reported fault" : "failed");
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if (efx->phy_mode & PHY_MODE_OFF) {
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/* Assume that board has shut PHY off */
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phy_data->phy_mode = PHY_MODE_OFF;
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} else {
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efx->phy_mode |= PHY_MODE_LOW_POWER;
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mdio_clause45_set_mmds_lpower(efx, true,
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efx->phy_op->mmds);
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phy_data->phy_mode |= PHY_MODE_LOW_POWER;
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}
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}
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return rc;
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}
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static void tenxpress_phy_fini(struct efx_nic *efx)
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{
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int reg;
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/* Power down the LNPGA */
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reg = (1 << PMA_PMD_LNPGA_POWERDOWN_LBN);
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mdio_clause45_write(efx, efx->mii.phy_id, MDIO_MMD_PMAPMD,
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PMA_PMD_XCONTROL_REG, reg);
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/* Waiting here ensures that the board fini, which can turn off the
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* power to the PHY, won't get run until the LNPGA powerdown has been
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* given long enough to complete. */
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schedule_timeout_uninterruptible(LNPGA_PDOWN_WAIT); /* 200 ms */
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kfree(efx->phy_data);
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efx->phy_data = NULL;
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}
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/* Set the RX and TX LEDs and Link LED flashing. The other LEDs
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* (which probably aren't wired anyway) are left in AUTO mode */
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void tenxpress_phy_blink(struct efx_nic *efx, bool blink)
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{
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int reg;
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if (blink)
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reg = (PMA_PMD_LED_FLASH << PMA_PMD_LED_TX_LBN) |
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(PMA_PMD_LED_FLASH << PMA_PMD_LED_RX_LBN) |
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(PMA_PMD_LED_FLASH << PMA_PMD_LED_LINK_LBN);
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else
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reg = PMA_PMD_LED_DEFAULT;
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mdio_clause45_write(efx, efx->mii.phy_id, MDIO_MMD_PMAPMD,
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PMA_PMD_LED_OVERR_REG, reg);
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}
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static int tenxpress_phy_test(struct efx_nic *efx)
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{
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/* BIST is automatically run after a special software reset */
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return tenxpress_special_reset(efx);
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}
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static u32 tenxpress_get_xnp_lpa(struct efx_nic *efx)
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{
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int phy = efx->mii.phy_id;
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u32 lpa = 0;
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int reg;
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reg = mdio_clause45_read(efx, phy, MDIO_MMD_AN, MDIO_AN_10GBT_STATUS);
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if (reg & (1 << MDIO_AN_10GBT_STATUS_LP_10G_LBN))
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lpa |= ADVERTISED_10000baseT_Full;
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return lpa;
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}
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static void
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tenxpress_get_settings(struct efx_nic *efx, struct ethtool_cmd *ecmd)
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{
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mdio_clause45_get_settings_ext(efx, ecmd, ADVERTISED_10000baseT_Full,
|
|
tenxpress_get_xnp_lpa(efx));
|
|
ecmd->supported |= SUPPORTED_10000baseT_Full;
|
|
ecmd->advertising |= ADVERTISED_10000baseT_Full;
|
|
}
|
|
|
|
struct efx_phy_operations falcon_tenxpress_phy_ops = {
|
|
.macs = EFX_XMAC,
|
|
.init = tenxpress_phy_init,
|
|
.reconfigure = tenxpress_phy_reconfigure,
|
|
.check_hw = tenxpress_phy_check_hw,
|
|
.fini = tenxpress_phy_fini,
|
|
.clear_interrupt = tenxpress_phy_clear_interrupt,
|
|
.test = tenxpress_phy_test,
|
|
.get_settings = tenxpress_get_settings,
|
|
.set_settings = mdio_clause45_set_settings,
|
|
.mmds = TENXPRESS_REQUIRED_DEVS,
|
|
.loopbacks = TENXPRESS_LOOPBACKS,
|
|
};
|