android_kernel_xiaomi_sm8350/arch/blackfin/mach-bf533/Kconfig
Bryan Wu 1394f03221 blackfin architecture
This adds support for the Analog Devices Blackfin processor architecture, and
currently supports the BF533, BF532, BF531, BF537, BF536, BF534, and BF561
(Dual Core) devices, with a variety of development platforms including those
avaliable from Analog Devices (BF533-EZKit, BF533-STAMP, BF537-STAMP,
BF561-EZKIT), and Bluetechnix!  Tinyboards.

The Blackfin architecture was jointly developed by Intel and Analog Devices
Inc.  (ADI) as the Micro Signal Architecture (MSA) core and introduced it in
December of 2000.  Since then ADI has put this core into its Blackfin
processor family of devices.  The Blackfin core has the advantages of a clean,
orthogonal,RISC-like microprocessor instruction set.  It combines a dual-MAC
(Multiply/Accumulate), state-of-the-art signal processing engine and
single-instruction, multiple-data (SIMD) multimedia capabilities into a single
instruction-set architecture.

The Blackfin architecture, including the instruction set, is described by the
ADSP-BF53x/BF56x Blackfin Processor Programming Reference
http://blackfin.uclinux.org/gf/download/frsrelease/29/2549/Blackfin_PRM.pdf

The Blackfin processor is already supported by major releases of gcc, and
there are binary and source rpms/tarballs for many architectures at:
http://blackfin.uclinux.org/gf/project/toolchain/frs There is complete
documentation, including "getting started" guides available at:
http://docs.blackfin.uclinux.org/ which provides links to the sources and
patches you will need in order to set up a cross-compiling environment for
bfin-linux-uclibc

This patch, as well as the other patches (toolchain, distribution,
uClibc) are actively supported by Analog Devices Inc, at:
http://blackfin.uclinux.org/

We have tested this on LTP, and our test plan (including pass/fails) can
be found at:
http://docs.blackfin.uclinux.org/doku.php?id=testing_the_linux_kernel

[m.kozlowski@tuxland.pl: balance parenthesis in blackfin header files]
Signed-off-by: Bryan Wu <bryan.wu@analog.com>
Signed-off-by: Mariusz Kozlowski <m.kozlowski@tuxland.pl>
Signed-off-by: Aubrey Li <aubrey.li@analog.com>
Signed-off-by: Jie Zhang <jie.zhang@analog.com>
Signed-off-by: Andrew Morton <akpm@linux-foundation.org>
Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
2007-05-07 12:12:58 -07:00

93 lines
1.5 KiB
Plaintext

if (BF533 || BF532 || BF531)
menu "BF533/2/1 Specific Configuration"
comment "Interrupt Priority Assignment"
menu "Priority"
config UART_ERROR
int "UART ERROR"
default 7
config SPORT0_ERROR
int "SPORT0 ERROR"
default 7
config SPI_ERROR
int "SPI ERROR"
default 7
config SPORT1_ERROR
int "SPORT1 ERROR"
default 7
config PPI_ERROR
int "PPI ERROR"
default 7
config DMA_ERROR
int "DMA ERROR"
default 7
config PLLWAKE_ERROR
int "PLL WAKEUP ERROR"
default 7
config RTC_ERROR
int "RTC ERROR"
default 8
config DMA0_PPI
int "DMA0 PPI"
default 8
config DMA1_SPORT0RX
int "DMA1 (SPORT0 RX)"
default 9
config DMA2_SPORT0TX
int "DMA2 (SPORT0 TX)"
default 9
config DMA3_SPORT1RX
int "DMA3 (SPORT1 RX)"
default 9
config DMA4_SPORT1TX
int "DMA4 (SPORT1 TX)"
default 9
config DMA5_SPI
int "DMA5 (SPI)"
default 10
config DMA6_UARTRX
int "DMA6 (UART0 RX)"
default 10
config DMA7_UARTTX
int "DMA7 (UART0 TX)"
default 10
config TIMER0
int "TIMER0"
default 11
config TIMER1
int "TIMER1"
default 11
config TIMER2
int "TIMER2"
default 11
config PFA
int "PF Interrupt A"
default 12
config PFB
int "PF Interrupt B"
default 12
config MEMDMA0
int "MEMORY DMA0"
default 13
config MEMDMA1
int "MEMORY DMA1"
default 13
config WDTIMER
int "WATCH DOG TIMER"
default 13
help
Enter the priority numbers between 7-13 ONLY. Others are Reserved.
This applies to all the above. It is not recommended to assign the
highest priority number 7 to UART or any other device.
endmenu
endmenu
endif