35f3c5185b
Trivial fixes for build breakage introduced by IRQ handler changes. Signed-off-by: Paul Mundt <lethal@linux-sh.org>
326 lines
7.1 KiB
C
326 lines
7.1 KiB
C
/*
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* linux/arch/sh/boards/mpc1211/setup.c
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*
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* Copyright (C) 2002 Saito.K & Jeanne, Fujii.Y
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*
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*/
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#include <linux/init.h>
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#include <linux/irq.h>
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#include <linux/hdreg.h>
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#include <linux/ide.h>
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#include <linux/interrupt.h>
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#include <asm/io.h>
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#include <asm/machvec.h>
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#include <asm/mpc1211/mpc1211.h>
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#include <asm/mpc1211/pci.h>
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#include <asm/mpc1211/m1543c.h>
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/* ALI15X3 SMBus address offsets */
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#define SMBHSTSTS (0 + 0x3100)
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#define SMBHSTCNT (1 + 0x3100)
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#define SMBHSTSTART (2 + 0x3100)
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#define SMBHSTCMD (7 + 0x3100)
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#define SMBHSTADD (3 + 0x3100)
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#define SMBHSTDAT0 (4 + 0x3100)
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#define SMBHSTDAT1 (5 + 0x3100)
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#define SMBBLKDAT (6 + 0x3100)
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/* Other settings */
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#define MAX_TIMEOUT 500 /* times 1/100 sec */
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/* ALI15X3 command constants */
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#define ALI15X3_ABORT 0x04
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#define ALI15X3_T_OUT 0x08
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#define ALI15X3_QUICK 0x00
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#define ALI15X3_BYTE 0x10
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#define ALI15X3_BYTE_DATA 0x20
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#define ALI15X3_WORD_DATA 0x30
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#define ALI15X3_BLOCK_DATA 0x40
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#define ALI15X3_BLOCK_CLR 0x80
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/* ALI15X3 status register bits */
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#define ALI15X3_STS_IDLE 0x04
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#define ALI15X3_STS_BUSY 0x08
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#define ALI15X3_STS_DONE 0x10
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#define ALI15X3_STS_DEV 0x20 /* device error */
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#define ALI15X3_STS_COLL 0x40 /* collision or no response */
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#define ALI15X3_STS_TERM 0x80 /* terminated by abort */
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#define ALI15X3_STS_ERR 0xE0 /* all the bad error bits */
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static void __init pci_write_config(unsigned long busNo,
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unsigned long devNo,
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unsigned long fncNo,
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unsigned long cnfAdd,
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unsigned long cnfData)
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{
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ctrl_outl((0x80000000
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+ ((busNo & 0xff) << 16)
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+ ((devNo & 0x1f) << 11)
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+ ((fncNo & 0x07) << 8)
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+ (cnfAdd & 0xfc)), PCIPAR);
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ctrl_outl(cnfData, PCIPDR);
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}
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/*
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Initialize IRQ setting
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*/
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static unsigned char m_irq_mask = 0xfb;
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static unsigned char s_irq_mask = 0xff;
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static void disable_mpc1211_irq(unsigned int irq)
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{
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if( irq < 8) {
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m_irq_mask |= (1 << irq);
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outb(m_irq_mask,I8259_M_MR);
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} else {
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s_irq_mask |= (1 << (irq - 8));
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outb(s_irq_mask,I8259_S_MR);
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}
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}
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static void enable_mpc1211_irq(unsigned int irq)
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{
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if( irq < 8) {
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m_irq_mask &= ~(1 << irq);
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outb(m_irq_mask,I8259_M_MR);
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} else {
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s_irq_mask &= ~(1 << (irq - 8));
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outb(s_irq_mask,I8259_S_MR);
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}
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}
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static inline int mpc1211_irq_real(unsigned int irq)
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{
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int value;
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int irqmask;
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if ( irq < 8) {
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irqmask = 1<<irq;
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outb(0x0b,I8259_M_CR); /* ISR register */
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value = inb(I8259_M_CR) & irqmask;
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outb(0x0a,I8259_M_CR); /* back ro the IPR reg */
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return value;
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}
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irqmask = 1<<(irq - 8);
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outb(0x0b,I8259_S_CR); /* ISR register */
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value = inb(I8259_S_CR) & irqmask;
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outb(0x0a,I8259_S_CR); /* back ro the IPR reg */
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return value;
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}
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static void mask_and_ack_mpc1211(unsigned int irq)
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{
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if(irq < 8) {
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if(m_irq_mask & (1<<irq)){
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if(!mpc1211_irq_real(irq)){
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atomic_inc(&irq_err_count)
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printk("spurious 8259A interrupt: IRQ %x\n",irq);
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}
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} else {
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m_irq_mask |= (1<<irq);
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}
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inb(I8259_M_MR); /* DUMMY */
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outb(m_irq_mask,I8259_M_MR); /* disable */
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outb(0x60+irq,I8259_M_CR); /* EOI */
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} else {
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if(s_irq_mask & (1<<(irq - 8))){
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if(!mpc1211_irq_real(irq)){
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atomic_inc(&irq_err_count);
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printk("spurious 8259A interrupt: IRQ %x\n",irq);
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}
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} else {
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s_irq_mask |= (1<<(irq - 8));
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}
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inb(I8259_S_MR); /* DUMMY */
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outb(s_irq_mask,I8259_S_MR); /* disable */
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outb(0x60+(irq-8),I8259_S_CR); /* EOI */
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outb(0x60+2,I8259_M_CR);
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}
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}
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static void end_mpc1211_irq(unsigned int irq)
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{
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enable_mpc1211_irq(irq);
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}
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static unsigned int startup_mpc1211_irq(unsigned int irq)
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{
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enable_mpc1211_irq(irq);
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return 0;
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}
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static void shutdown_mpc1211_irq(unsigned int irq)
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{
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disable_mpc1211_irq(irq);
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}
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static struct hw_interrupt_type mpc1211_irq_type = {
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.typename = "MPC1211-IRQ",
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.startup = startup_mpc1211_irq,
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.shutdown = shutdown_mpc1211_irq,
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.enable = enable_mpc1211_irq,
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.disable = disable_mpc1211_irq,
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.ack = mask_and_ack_mpc1211,
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.end = end_mpc1211_irq
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};
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static void make_mpc1211_irq(unsigned int irq)
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{
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irq_desc[irq].chip = &mpc1211_irq_type;
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irq_desc[irq].status = IRQ_DISABLED;
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irq_desc[irq].action = 0;
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irq_desc[irq].depth = 1;
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disable_mpc1211_irq(irq);
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}
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int mpc1211_irq_demux(int irq)
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{
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unsigned int poll;
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if( irq == 2 ) {
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outb(0x0c,I8259_M_CR);
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poll = inb(I8259_M_CR);
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if(poll & 0x80) {
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irq = (poll & 0x07);
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}
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if( irq == 2) {
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outb(0x0c,I8259_S_CR);
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poll = inb(I8259_S_CR);
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irq = (poll & 0x07) + 8;
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}
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}
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return irq;
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}
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static void __init init_mpc1211_IRQ(void)
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{
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int i;
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/*
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* Super I/O (Just mimic PC):
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* 1: keyboard
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* 3: serial 1
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* 4: serial 0
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* 5: printer
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* 6: floppy
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* 8: rtc
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* 10: lan
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* 12: mouse
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* 14: ide0
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* 15: ide1
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*/
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pci_write_config(0,0,0,0x54, 0xb0b0002d);
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outb(0x11, I8259_M_CR); /* mater icw1 edge trigger */
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outb(0x11, I8259_S_CR); /* slave icw1 edge trigger */
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outb(0x20, I8259_M_MR); /* m icw2 base vec 0x08 */
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outb(0x28, I8259_S_MR); /* s icw2 base vec 0x70 */
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outb(0x04, I8259_M_MR); /* m icw3 slave irq2 */
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outb(0x02, I8259_S_MR); /* s icw3 slave id */
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outb(0x01, I8259_M_MR); /* m icw4 non buf normal eoi*/
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outb(0x01, I8259_S_MR); /* s icw4 non buf normal eo1*/
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outb(0xfb, I8259_M_MR); /* disable irq0--irq7 */
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outb(0xff, I8259_S_MR); /* disable irq8--irq15 */
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for ( i=0; i < 16; i++) {
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if(i != 2) {
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make_mpc1211_irq(i);
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}
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}
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}
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static void delay1000(void)
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{
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int i;
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for (i=0; i<1000; i++)
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ctrl_delay();
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}
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static int put_smb_blk(unsigned char *p, int address, int command, int no)
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{
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int temp;
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int timeout;
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int i;
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outb(0xff, SMBHSTSTS);
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temp = inb(SMBHSTSTS);
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for (timeout = 0; (timeout < MAX_TIMEOUT) && !(temp & ALI15X3_STS_IDLE); timeout++) {
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delay1000();
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temp = inb(SMBHSTSTS);
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}
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if (timeout >= MAX_TIMEOUT){
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return -1;
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}
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outb(((address & 0x7f) << 1), SMBHSTADD);
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outb(0xc0, SMBHSTCNT);
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outb(command & 0xff, SMBHSTCMD);
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outb(no & 0x1f, SMBHSTDAT0);
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for(i = 1; i <= no; i++) {
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outb(*p++, SMBBLKDAT);
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}
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outb(0xff, SMBHSTSTART);
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temp = inb(SMBHSTSTS);
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for (timeout = 0; (timeout < MAX_TIMEOUT) && !(temp & (ALI15X3_STS_ERR | ALI15X3_STS_DONE)); timeout++) {
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delay1000();
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temp = inb(SMBHSTSTS);
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}
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if (timeout >= MAX_TIMEOUT) {
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return -2;
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}
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if ( temp & ALI15X3_STS_ERR ){
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return -3;
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}
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return 0;
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}
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/* arch/sh/boards/mpc1211/rtc.c */
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void mpc1211_time_init(void);
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static void __init mpc1211_setup(char **cmdline_p)
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{
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unsigned char spd_buf[128];
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__set_io_port_base(PA_PCI_IO);
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pci_write_config(0,0,0,0x54, 0xb0b00000);
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do {
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outb(ALI15X3_ABORT, SMBHSTCNT);
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spd_buf[0] = 0x0c;
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spd_buf[1] = 0x43;
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spd_buf[2] = 0x7f;
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spd_buf[3] = 0x03;
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spd_buf[4] = 0x00;
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spd_buf[5] = 0x03;
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spd_buf[6] = 0x00;
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} while (put_smb_blk(spd_buf, 0x69, 0, 7) < 0);
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board_time_init = mpc1211_time_init;
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return 0;
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}
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/*
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* The Machine Vector
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*/
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struct sh_machine_vector mv_mpc1211 __initmv = {
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.mv_name = "Interface MPC-1211(CTP/PCI/MPC-SH02)",
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.mv_setup = mpc1211_setup,
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.mv_nr_irqs = 48,
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.mv_irq_demux = mpc1211_irq_demux,
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.mv_init_irq = init_mpc1211_IRQ,
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#ifdef CONFIG_HEARTBEAT
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.mv_heartbeat = heartbeat_mpc1211,
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#endif
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};
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ALIAS_MV(mpc1211)
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