1da177e4c3
Initial git repository build. I'm not bothering with the full history, even though we have it. We can create a separate "historical" git archive of that later if we want to, and in the meantime it's about 3.2GB when imported into git - space that would just make the early git days unnecessarily complicated, when we don't have a lot of good infrastructure for it. Let it rip!
185 lines
5.5 KiB
C
185 lines
5.5 KiB
C
#ifndef __ASM_ARM_DMA_H
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#define __ASM_ARM_DMA_H
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typedef unsigned int dmach_t;
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#include <linux/config.h>
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#include <linux/spinlock.h>
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#include <asm/system.h>
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#include <asm/memory.h>
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#include <asm/scatterlist.h>
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// FIXME - do we really need this? arm26 cant do 'proper' DMA
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typedef struct dma_struct dma_t;
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typedef unsigned int dmamode_t;
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struct dma_ops {
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int (*request)(dmach_t, dma_t *); /* optional */
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void (*free)(dmach_t, dma_t *); /* optional */
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void (*enable)(dmach_t, dma_t *); /* mandatory */
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void (*disable)(dmach_t, dma_t *); /* mandatory */
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int (*residue)(dmach_t, dma_t *); /* optional */
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int (*setspeed)(dmach_t, dma_t *, int); /* optional */
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char *type;
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};
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struct dma_struct {
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struct scatterlist buf; /* single DMA */
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int sgcount; /* number of DMA SG */
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struct scatterlist *sg; /* DMA Scatter-Gather List */
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unsigned int active:1; /* Transfer active */
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unsigned int invalid:1; /* Address/Count changed */
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unsigned int using_sg:1; /* using scatter list? */
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dmamode_t dma_mode; /* DMA mode */
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int speed; /* DMA speed */
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unsigned int lock; /* Device is allocated */
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const char *device_id; /* Device name */
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unsigned int dma_base; /* Controller base address */
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int dma_irq; /* Controller IRQ */
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int state; /* Controller state */
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struct scatterlist cur_sg; /* Current controller buffer */
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struct dma_ops *d_ops;
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};
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/* Prototype: void arch_dma_init(dma)
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* Purpose : Initialise architecture specific DMA
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* Params : dma - pointer to array of DMA structures
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*/
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extern void arch_dma_init(dma_t *dma);
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extern void isa_init_dma(dma_t *dma);
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#define MAX_DMA_ADDRESS 0x03000000
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#define MAX_DMA_CHANNELS 3
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/* ARC */
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#define DMA_VIRTUAL_FLOPPY0 0
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#define DMA_VIRTUAL_FLOPPY1 1
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#define DMA_VIRTUAL_SOUND 2
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/* A5K */
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#define DMA_FLOPPY 0
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/*
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* DMA modes
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*/
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#define DMA_MODE_MASK 3
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#define DMA_MODE_READ 0
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#define DMA_MODE_WRITE 1
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#define DMA_MODE_CASCADE 2
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#define DMA_AUTOINIT 4
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extern spinlock_t dma_spin_lock;
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static inline unsigned long claim_dma_lock(void)
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{
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unsigned long flags;
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spin_lock_irqsave(&dma_spin_lock, flags);
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return flags;
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}
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static inline void release_dma_lock(unsigned long flags)
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{
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spin_unlock_irqrestore(&dma_spin_lock, flags);
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}
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/* Clear the 'DMA Pointer Flip Flop'.
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* Write 0 for LSB/MSB, 1 for MSB/LSB access.
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*/
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#define clear_dma_ff(channel)
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/* Set only the page register bits of the transfer address.
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*
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* NOTE: This is an architecture specific function, and should
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* be hidden from the drivers
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*/
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extern void set_dma_page(dmach_t channel, char pagenr);
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/* Request a DMA channel
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*
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* Some architectures may need to do allocate an interrupt
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*/
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extern int request_dma(dmach_t channel, const char * device_id);
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/* Free a DMA channel
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*
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* Some architectures may need to do free an interrupt
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*/
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extern void free_dma(dmach_t channel);
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/* Enable DMA for this channel
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*
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* On some architectures, this may have other side effects like
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* enabling an interrupt and setting the DMA registers.
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*/
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extern void enable_dma(dmach_t channel);
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/* Disable DMA for this channel
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*
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* On some architectures, this may have other side effects like
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* disabling an interrupt or whatever.
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*/
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extern void disable_dma(dmach_t channel);
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/* Test whether the specified channel has an active DMA transfer
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*/
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extern int dma_channel_active(dmach_t channel);
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/* Set the DMA scatter gather list for this channel
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*
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* This should not be called if a DMA channel is enabled,
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* especially since some DMA architectures don't update the
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* DMA address immediately, but defer it to the enable_dma().
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*/
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extern void set_dma_sg(dmach_t channel, struct scatterlist *sg, int nr_sg);
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/* Set the DMA address for this channel
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*
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* This should not be called if a DMA channel is enabled,
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* especially since some DMA architectures don't update the
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* DMA address immediately, but defer it to the enable_dma().
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*/
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extern void set_dma_addr(dmach_t channel, unsigned long physaddr);
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/* Set the DMA byte count for this channel
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*
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* This should not be called if a DMA channel is enabled,
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* especially since some DMA architectures don't update the
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* DMA count immediately, but defer it to the enable_dma().
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*/
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extern void set_dma_count(dmach_t channel, unsigned long count);
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/* Set the transfer direction for this channel
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*
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* This should not be called if a DMA channel is enabled,
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* especially since some DMA architectures don't update the
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* DMA transfer direction immediately, but defer it to the
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* enable_dma().
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*/
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extern void set_dma_mode(dmach_t channel, dmamode_t mode);
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/* Set the transfer speed for this channel
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*/
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extern void set_dma_speed(dmach_t channel, int cycle_ns);
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/* Get DMA residue count. After a DMA transfer, this
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* should return zero. Reading this while a DMA transfer is
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* still in progress will return unpredictable results.
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* If called before the channel has been used, it may return 1.
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* Otherwise, it returns the number of _bytes_ left to transfer.
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*/
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extern int get_dma_residue(dmach_t channel);
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#ifndef NO_DMA
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#define NO_DMA 255
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#endif
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#endif /* _ARM_DMA_H */
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