550a7375fe
This patch adds support for MUSB and TUSB controllers integrated into omap2430 and davinci. It also adds support for external tusb6010 controller. Cc: David Brownell <dbrownell@users.sourceforge.net> Cc: Tony Lindgren <tony@atomide.com> Signed-off-by: Felipe Balbi <felipe.balbi@nokia.com> Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de>
831 lines
19 KiB
C
831 lines
19 KiB
C
/*
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* MUSB OTG driver debug support
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*
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* Copyright 2005 Mentor Graphics Corporation
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* Copyright (C) 2005-2006 by Texas Instruments
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* Copyright (C) 2006-2007 Nokia Corporation
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*
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* This program is free software; you can redistribute it and/or
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* modify it under the terms of the GNU General Public License
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* version 2 as published by the Free Software Foundation.
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*
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* This program is distributed in the hope that it will be useful, but
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* WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
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* General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, write to the Free Software
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* Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA
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* 02110-1301 USA
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*
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* THIS SOFTWARE IS PROVIDED "AS IS" AND ANY EXPRESS OR IMPLIED
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* WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
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* MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN
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* NO EVENT SHALL THE AUTHORS BE LIABLE FOR ANY DIRECT, INDIRECT,
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* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
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* NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF
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* USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
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* ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
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* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
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* THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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*
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*/
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#include <linux/kernel.h>
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#include <linux/proc_fs.h>
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#include <linux/seq_file.h>
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#include <linux/uaccess.h> /* FIXME remove procfs writes */
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#include <asm/arch/hardware.h>
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#include "musb_core.h"
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#include "davinci.h"
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#ifdef CONFIG_USB_MUSB_HDRC_HCD
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static int dump_qh(struct musb_qh *qh, char *buf, unsigned max)
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{
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int count;
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int tmp;
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struct usb_host_endpoint *hep = qh->hep;
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struct urb *urb;
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count = snprintf(buf, max, " qh %p dev%d ep%d%s max%d\n",
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qh, qh->dev->devnum, qh->epnum,
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({ char *s; switch (qh->type) {
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case USB_ENDPOINT_XFER_BULK:
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s = "-bulk"; break;
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case USB_ENDPOINT_XFER_INT:
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s = "-int"; break;
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case USB_ENDPOINT_XFER_CONTROL:
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s = ""; break;
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default:
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s = "iso"; break;
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}; s; }),
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qh->maxpacket);
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if (count <= 0)
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return 0;
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buf += count;
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max -= count;
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list_for_each_entry(urb, &hep->urb_list, urb_list) {
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tmp = snprintf(buf, max, "\t%s urb %p %d/%d\n",
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usb_pipein(urb->pipe) ? "in" : "out",
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urb, urb->actual_length,
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urb->transfer_buffer_length);
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if (tmp <= 0)
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break;
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tmp = min(tmp, (int)max);
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count += tmp;
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buf += tmp;
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max -= tmp;
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}
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return count;
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}
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static int
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dump_queue(struct list_head *q, char *buf, unsigned max)
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{
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int count = 0;
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struct musb_qh *qh;
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list_for_each_entry(qh, q, ring) {
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int tmp;
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tmp = dump_qh(qh, buf, max);
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if (tmp <= 0)
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break;
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tmp = min(tmp, (int)max);
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count += tmp;
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buf += tmp;
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max -= tmp;
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}
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return count;
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}
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#endif /* HCD */
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#ifdef CONFIG_USB_GADGET_MUSB_HDRC
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static int dump_ep(struct musb_ep *ep, char *buffer, unsigned max)
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{
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char *buf = buffer;
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int code = 0;
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void __iomem *regs = ep->hw_ep->regs;
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char *mode = "1buf";
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if (ep->is_in) {
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if (ep->hw_ep->tx_double_buffered)
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mode = "2buf";
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} else {
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if (ep->hw_ep->rx_double_buffered)
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mode = "2buf";
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}
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do {
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struct usb_request *req;
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code = snprintf(buf, max,
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"\n%s (hw%d): %s%s, csr %04x maxp %04x\n",
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ep->name, ep->current_epnum,
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mode, ep->dma ? " dma" : "",
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musb_readw(regs,
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(ep->is_in || !ep->current_epnum)
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? MUSB_TXCSR
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: MUSB_RXCSR),
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musb_readw(regs, ep->is_in
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? MUSB_TXMAXP
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: MUSB_RXMAXP)
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);
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if (code <= 0)
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break;
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code = min(code, (int) max);
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buf += code;
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max -= code;
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if (is_cppi_enabled() && ep->current_epnum) {
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unsigned cppi = ep->current_epnum - 1;
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void __iomem *base = ep->musb->ctrl_base;
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unsigned off1 = cppi << 2;
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void __iomem *ram = base;
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char tmp[16];
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if (ep->is_in) {
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ram += DAVINCI_TXCPPI_STATERAM_OFFSET(cppi);
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tmp[0] = 0;
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} else {
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ram += DAVINCI_RXCPPI_STATERAM_OFFSET(cppi);
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snprintf(tmp, sizeof tmp, "%d left, ",
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musb_readl(base,
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DAVINCI_RXCPPI_BUFCNT0_REG + off1));
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}
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code = snprintf(buf, max, "%cX DMA%d: %s"
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"%08x %08x, %08x %08x; "
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"%08x %08x %08x .. %08x\n",
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ep->is_in ? 'T' : 'R',
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ep->current_epnum - 1, tmp,
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musb_readl(ram, 0 * 4),
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musb_readl(ram, 1 * 4),
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musb_readl(ram, 2 * 4),
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musb_readl(ram, 3 * 4),
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musb_readl(ram, 4 * 4),
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musb_readl(ram, 5 * 4),
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musb_readl(ram, 6 * 4),
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musb_readl(ram, 7 * 4));
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if (code <= 0)
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break;
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code = min(code, (int) max);
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buf += code;
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max -= code;
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}
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if (list_empty(&ep->req_list)) {
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code = snprintf(buf, max, "\t(queue empty)\n");
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if (code <= 0)
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break;
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code = min(code, (int) max);
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buf += code;
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max -= code;
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break;
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}
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list_for_each_entry(req, &ep->req_list, list) {
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code = snprintf(buf, max, "\treq %p, %s%s%d/%d\n",
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req,
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req->zero ? "zero, " : "",
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req->short_not_ok ? "!short, " : "",
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req->actual, req->length);
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if (code <= 0)
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break;
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code = min(code, (int) max);
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buf += code;
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max -= code;
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}
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} while (0);
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return buf - buffer;
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}
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#endif
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static int
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dump_end_info(struct musb *musb, u8 epnum, char *aBuffer, unsigned max)
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{
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int code = 0;
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char *buf = aBuffer;
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struct musb_hw_ep *hw_ep = &musb->endpoints[epnum];
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do {
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musb_ep_select(musb->mregs, epnum);
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#ifdef CONFIG_USB_MUSB_HDRC_HCD
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if (is_host_active(musb)) {
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int dump_rx, dump_tx;
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void __iomem *regs = hw_ep->regs;
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/* TEMPORARY (!) until we have a real periodic
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* schedule tree ...
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*/
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if (!epnum) {
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/* control is shared, uses RX queue
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* but (mostly) shadowed tx registers
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*/
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dump_tx = !list_empty(&musb->control);
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dump_rx = 0;
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} else if (hw_ep == musb->bulk_ep) {
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dump_tx = !list_empty(&musb->out_bulk);
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dump_rx = !list_empty(&musb->in_bulk);
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} else if (musb->periodic[epnum]) {
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struct usb_host_endpoint *hep;
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hep = musb->periodic[epnum]->hep;
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dump_rx = hep->desc.bEndpointAddress
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& USB_ENDPOINT_DIR_MASK;
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dump_tx = !dump_rx;
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} else
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break;
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/* END TEMPORARY */
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if (dump_rx) {
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code = snprintf(buf, max,
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"\nRX%d: %s rxcsr %04x interval %02x "
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"max %04x type %02x; "
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"dev %d hub %d port %d"
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"\n",
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epnum,
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hw_ep->rx_double_buffered
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? "2buf" : "1buf",
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musb_readw(regs, MUSB_RXCSR),
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musb_readb(regs, MUSB_RXINTERVAL),
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musb_readw(regs, MUSB_RXMAXP),
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musb_readb(regs, MUSB_RXTYPE),
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/* FIXME: assumes multipoint */
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musb_readb(musb->mregs,
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MUSB_BUSCTL_OFFSET(epnum,
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MUSB_RXFUNCADDR)),
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musb_readb(musb->mregs,
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MUSB_BUSCTL_OFFSET(epnum,
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MUSB_RXHUBADDR)),
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musb_readb(musb->mregs,
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MUSB_BUSCTL_OFFSET(epnum,
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MUSB_RXHUBPORT))
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);
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if (code <= 0)
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break;
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code = min(code, (int) max);
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buf += code;
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max -= code;
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if (is_cppi_enabled()
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&& epnum
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&& hw_ep->rx_channel) {
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unsigned cppi = epnum - 1;
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unsigned off1 = cppi << 2;
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void __iomem *base;
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void __iomem *ram;
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char tmp[16];
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base = musb->ctrl_base;
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ram = DAVINCI_RXCPPI_STATERAM_OFFSET(
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cppi) + base;
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snprintf(tmp, sizeof tmp, "%d left, ",
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musb_readl(base,
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DAVINCI_RXCPPI_BUFCNT0_REG
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+ off1));
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code = snprintf(buf, max,
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" rx dma%d: %s"
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"%08x %08x, %08x %08x; "
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"%08x %08x %08x .. %08x\n",
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cppi, tmp,
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musb_readl(ram, 0 * 4),
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musb_readl(ram, 1 * 4),
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musb_readl(ram, 2 * 4),
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musb_readl(ram, 3 * 4),
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musb_readl(ram, 4 * 4),
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musb_readl(ram, 5 * 4),
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musb_readl(ram, 6 * 4),
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musb_readl(ram, 7 * 4));
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if (code <= 0)
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break;
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code = min(code, (int) max);
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buf += code;
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max -= code;
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}
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if (hw_ep == musb->bulk_ep
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&& !list_empty(
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&musb->in_bulk)) {
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code = dump_queue(&musb->in_bulk,
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buf, max);
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if (code <= 0)
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break;
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code = min(code, (int) max);
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buf += code;
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max -= code;
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} else if (musb->periodic[epnum]) {
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code = dump_qh(musb->periodic[epnum],
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buf, max);
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if (code <= 0)
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break;
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code = min(code, (int) max);
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buf += code;
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max -= code;
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}
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}
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if (dump_tx) {
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code = snprintf(buf, max,
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"\nTX%d: %s txcsr %04x interval %02x "
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"max %04x type %02x; "
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"dev %d hub %d port %d"
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"\n",
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epnum,
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hw_ep->tx_double_buffered
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? "2buf" : "1buf",
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musb_readw(regs, MUSB_TXCSR),
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musb_readb(regs, MUSB_TXINTERVAL),
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musb_readw(regs, MUSB_TXMAXP),
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musb_readb(regs, MUSB_TXTYPE),
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/* FIXME: assumes multipoint */
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musb_readb(musb->mregs,
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MUSB_BUSCTL_OFFSET(epnum,
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MUSB_TXFUNCADDR)),
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musb_readb(musb->mregs,
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MUSB_BUSCTL_OFFSET(epnum,
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MUSB_TXHUBADDR)),
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musb_readb(musb->mregs,
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MUSB_BUSCTL_OFFSET(epnum,
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MUSB_TXHUBPORT))
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);
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if (code <= 0)
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break;
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code = min(code, (int) max);
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buf += code;
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max -= code;
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if (is_cppi_enabled()
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&& epnum
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&& hw_ep->tx_channel) {
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unsigned cppi = epnum - 1;
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void __iomem *base;
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void __iomem *ram;
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base = musb->ctrl_base;
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ram = DAVINCI_RXCPPI_STATERAM_OFFSET(
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cppi) + base;
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code = snprintf(buf, max,
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" tx dma%d: "
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"%08x %08x, %08x %08x; "
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"%08x %08x %08x .. %08x\n",
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cppi,
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musb_readl(ram, 0 * 4),
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musb_readl(ram, 1 * 4),
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musb_readl(ram, 2 * 4),
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musb_readl(ram, 3 * 4),
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musb_readl(ram, 4 * 4),
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musb_readl(ram, 5 * 4),
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musb_readl(ram, 6 * 4),
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musb_readl(ram, 7 * 4));
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if (code <= 0)
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break;
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code = min(code, (int) max);
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buf += code;
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max -= code;
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}
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if (hw_ep == musb->control_ep
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&& !list_empty(
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&musb->control)) {
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code = dump_queue(&musb->control,
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buf, max);
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if (code <= 0)
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break;
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code = min(code, (int) max);
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buf += code;
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max -= code;
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} else if (hw_ep == musb->bulk_ep
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&& !list_empty(
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&musb->out_bulk)) {
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code = dump_queue(&musb->out_bulk,
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buf, max);
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if (code <= 0)
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break;
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code = min(code, (int) max);
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buf += code;
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max -= code;
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} else if (musb->periodic[epnum]) {
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code = dump_qh(musb->periodic[epnum],
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buf, max);
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if (code <= 0)
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break;
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code = min(code, (int) max);
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buf += code;
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max -= code;
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}
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}
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}
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#endif
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#ifdef CONFIG_USB_GADGET_MUSB_HDRC
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if (is_peripheral_active(musb)) {
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code = 0;
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|
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if (hw_ep->ep_in.desc || !epnum) {
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code = dump_ep(&hw_ep->ep_in, buf, max);
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if (code <= 0)
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break;
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code = min(code, (int) max);
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buf += code;
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max -= code;
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}
|
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if (hw_ep->ep_out.desc) {
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code = dump_ep(&hw_ep->ep_out, buf, max);
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if (code <= 0)
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break;
|
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code = min(code, (int) max);
|
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buf += code;
|
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max -= code;
|
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}
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}
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#endif
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} while (0);
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|
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return buf - aBuffer;
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}
|
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|
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/* Dump the current status and compile options.
|
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* @param musb the device driver instance
|
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* @param buffer where to dump the status; it must be big enough to hold the
|
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* result otherwise "BAD THINGS HAPPENS(TM)".
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*/
|
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static int dump_header_stats(struct musb *musb, char *buffer)
|
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{
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int code, count = 0;
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const void __iomem *mbase = musb->mregs;
|
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|
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*buffer = 0;
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count = sprintf(buffer, "Status: %sHDRC, Mode=%s "
|
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"(Power=%02x, DevCtl=%02x)\n",
|
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(musb->is_multipoint ? "M" : ""), MUSB_MODE(musb),
|
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musb_readb(mbase, MUSB_POWER),
|
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musb_readb(mbase, MUSB_DEVCTL));
|
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if (count <= 0)
|
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return 0;
|
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buffer += count;
|
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|
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code = sprintf(buffer, "OTG state: %s; %sactive\n",
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otg_state_string(musb),
|
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musb->is_active ? "" : "in");
|
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if (code <= 0)
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goto done;
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buffer += code;
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count += code;
|
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|
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code = sprintf(buffer,
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"Options: "
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#ifdef CONFIG_MUSB_PIO_ONLY
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"pio"
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#elif defined(CONFIG_USB_TI_CPPI_DMA)
|
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"cppi-dma"
|
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#elif defined(CONFIG_USB_INVENTRA_DMA)
|
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"musb-dma"
|
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#elif defined(CONFIG_USB_TUSB_OMAP_DMA)
|
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"tusb-omap-dma"
|
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#else
|
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"?dma?"
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#endif
|
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", "
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|
#ifdef CONFIG_USB_MUSB_OTG
|
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"otg (peripheral+host)"
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#elif defined(CONFIG_USB_GADGET_MUSB_HDRC)
|
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"peripheral"
|
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#elif defined(CONFIG_USB_MUSB_HDRC_HCD)
|
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"host"
|
|
#endif
|
|
", debug=%d [eps=%d]\n",
|
|
debug,
|
|
musb->nr_endpoints);
|
|
if (code <= 0)
|
|
goto done;
|
|
count += code;
|
|
buffer += code;
|
|
|
|
#ifdef CONFIG_USB_GADGET_MUSB_HDRC
|
|
code = sprintf(buffer, "Peripheral address: %02x\n",
|
|
musb_readb(musb->ctrl_base, MUSB_FADDR));
|
|
if (code <= 0)
|
|
goto done;
|
|
buffer += code;
|
|
count += code;
|
|
#endif
|
|
|
|
#ifdef CONFIG_USB_MUSB_HDRC_HCD
|
|
code = sprintf(buffer, "Root port status: %08x\n",
|
|
musb->port1_status);
|
|
if (code <= 0)
|
|
goto done;
|
|
buffer += code;
|
|
count += code;
|
|
#endif
|
|
|
|
#ifdef CONFIG_ARCH_DAVINCI
|
|
code = sprintf(buffer,
|
|
"DaVinci: ctrl=%02x stat=%1x phy=%03x\n"
|
|
"\trndis=%05x auto=%04x intsrc=%08x intmsk=%08x"
|
|
"\n",
|
|
musb_readl(musb->ctrl_base, DAVINCI_USB_CTRL_REG),
|
|
musb_readl(musb->ctrl_base, DAVINCI_USB_STAT_REG),
|
|
__raw_readl((void __force __iomem *)
|
|
IO_ADDRESS(USBPHY_CTL_PADDR)),
|
|
musb_readl(musb->ctrl_base, DAVINCI_RNDIS_REG),
|
|
musb_readl(musb->ctrl_base, DAVINCI_AUTOREQ_REG),
|
|
musb_readl(musb->ctrl_base,
|
|
DAVINCI_USB_INT_SOURCE_REG),
|
|
musb_readl(musb->ctrl_base,
|
|
DAVINCI_USB_INT_MASK_REG));
|
|
if (code <= 0)
|
|
goto done;
|
|
count += code;
|
|
buffer += code;
|
|
#endif /* DAVINCI */
|
|
|
|
#ifdef CONFIG_USB_TUSB6010
|
|
code = sprintf(buffer,
|
|
"TUSB6010: devconf %08x, phy enable %08x drive %08x"
|
|
"\n\totg %03x timer %08x"
|
|
"\n\tprcm conf %08x mgmt %08x; int src %08x mask %08x"
|
|
"\n",
|
|
musb_readl(musb->ctrl_base, TUSB_DEV_CONF),
|
|
musb_readl(musb->ctrl_base, TUSB_PHY_OTG_CTRL_ENABLE),
|
|
musb_readl(musb->ctrl_base, TUSB_PHY_OTG_CTRL),
|
|
musb_readl(musb->ctrl_base, TUSB_DEV_OTG_STAT),
|
|
musb_readl(musb->ctrl_base, TUSB_DEV_OTG_TIMER),
|
|
musb_readl(musb->ctrl_base, TUSB_PRCM_CONF),
|
|
musb_readl(musb->ctrl_base, TUSB_PRCM_MNGMT),
|
|
musb_readl(musb->ctrl_base, TUSB_INT_SRC),
|
|
musb_readl(musb->ctrl_base, TUSB_INT_MASK));
|
|
if (code <= 0)
|
|
goto done;
|
|
count += code;
|
|
buffer += code;
|
|
#endif /* DAVINCI */
|
|
|
|
if (is_cppi_enabled() && musb->dma_controller) {
|
|
code = sprintf(buffer,
|
|
"CPPI: txcr=%d txsrc=%01x txena=%01x; "
|
|
"rxcr=%d rxsrc=%01x rxena=%01x "
|
|
"\n",
|
|
musb_readl(musb->ctrl_base,
|
|
DAVINCI_TXCPPI_CTRL_REG),
|
|
musb_readl(musb->ctrl_base,
|
|
DAVINCI_TXCPPI_RAW_REG),
|
|
musb_readl(musb->ctrl_base,
|
|
DAVINCI_TXCPPI_INTENAB_REG),
|
|
musb_readl(musb->ctrl_base,
|
|
DAVINCI_RXCPPI_CTRL_REG),
|
|
musb_readl(musb->ctrl_base,
|
|
DAVINCI_RXCPPI_RAW_REG),
|
|
musb_readl(musb->ctrl_base,
|
|
DAVINCI_RXCPPI_INTENAB_REG));
|
|
if (code <= 0)
|
|
goto done;
|
|
count += code;
|
|
buffer += code;
|
|
}
|
|
|
|
#ifdef CONFIG_USB_GADGET_MUSB_HDRC
|
|
if (is_peripheral_enabled(musb)) {
|
|
code = sprintf(buffer, "Gadget driver: %s\n",
|
|
musb->gadget_driver
|
|
? musb->gadget_driver->driver.name
|
|
: "(none)");
|
|
if (code <= 0)
|
|
goto done;
|
|
count += code;
|
|
buffer += code;
|
|
}
|
|
#endif
|
|
|
|
done:
|
|
return count;
|
|
}
|
|
|
|
/* Write to ProcFS
|
|
*
|
|
* C soft-connect
|
|
* c soft-disconnect
|
|
* I enable HS
|
|
* i disable HS
|
|
* s stop session
|
|
* F force session (OTG-unfriendly)
|
|
* E rElinquish bus (OTG)
|
|
* H request host mode
|
|
* h cancel host request
|
|
* T start sending TEST_PACKET
|
|
* D<num> set/query the debug level
|
|
*/
|
|
static int musb_proc_write(struct file *file, const char __user *buffer,
|
|
unsigned long count, void *data)
|
|
{
|
|
char cmd;
|
|
u8 reg;
|
|
struct musb *musb = (struct musb *)data;
|
|
void __iomem *mbase = musb->mregs;
|
|
|
|
/* MOD_INC_USE_COUNT; */
|
|
|
|
if (unlikely(copy_from_user(&cmd, buffer, 1)))
|
|
return -EFAULT;
|
|
|
|
switch (cmd) {
|
|
case 'C':
|
|
if (mbase) {
|
|
reg = musb_readb(mbase, MUSB_POWER)
|
|
| MUSB_POWER_SOFTCONN;
|
|
musb_writeb(mbase, MUSB_POWER, reg);
|
|
}
|
|
break;
|
|
|
|
case 'c':
|
|
if (mbase) {
|
|
reg = musb_readb(mbase, MUSB_POWER)
|
|
& ~MUSB_POWER_SOFTCONN;
|
|
musb_writeb(mbase, MUSB_POWER, reg);
|
|
}
|
|
break;
|
|
|
|
case 'I':
|
|
if (mbase) {
|
|
reg = musb_readb(mbase, MUSB_POWER)
|
|
| MUSB_POWER_HSENAB;
|
|
musb_writeb(mbase, MUSB_POWER, reg);
|
|
}
|
|
break;
|
|
|
|
case 'i':
|
|
if (mbase) {
|
|
reg = musb_readb(mbase, MUSB_POWER)
|
|
& ~MUSB_POWER_HSENAB;
|
|
musb_writeb(mbase, MUSB_POWER, reg);
|
|
}
|
|
break;
|
|
|
|
case 'F':
|
|
reg = musb_readb(mbase, MUSB_DEVCTL);
|
|
reg |= MUSB_DEVCTL_SESSION;
|
|
musb_writeb(mbase, MUSB_DEVCTL, reg);
|
|
break;
|
|
|
|
case 'H':
|
|
if (mbase) {
|
|
reg = musb_readb(mbase, MUSB_DEVCTL);
|
|
reg |= MUSB_DEVCTL_HR;
|
|
musb_writeb(mbase, MUSB_DEVCTL, reg);
|
|
/* MUSB_HST_MODE( ((struct musb*)data) ); */
|
|
/* WARNING("Host Mode\n"); */
|
|
}
|
|
break;
|
|
|
|
case 'h':
|
|
if (mbase) {
|
|
reg = musb_readb(mbase, MUSB_DEVCTL);
|
|
reg &= ~MUSB_DEVCTL_HR;
|
|
musb_writeb(mbase, MUSB_DEVCTL, reg);
|
|
}
|
|
break;
|
|
|
|
case 'T':
|
|
if (mbase) {
|
|
musb_load_testpacket(musb);
|
|
musb_writeb(mbase, MUSB_TESTMODE,
|
|
MUSB_TEST_PACKET);
|
|
}
|
|
break;
|
|
|
|
#if (MUSB_DEBUG > 0)
|
|
/* set/read debug level */
|
|
case 'D':{
|
|
if (count > 1) {
|
|
char digits[8], *p = digits;
|
|
int i = 0, level = 0, sign = 1;
|
|
int len = min(count - 1, (unsigned long)8);
|
|
|
|
if (copy_from_user(&digits, &buffer[1], len))
|
|
return -EFAULT;
|
|
|
|
/* optional sign */
|
|
if (*p == '-') {
|
|
len -= 1;
|
|
sign = -sign;
|
|
p++;
|
|
}
|
|
|
|
/* read it */
|
|
while (i++ < len && *p > '0' && *p < '9') {
|
|
level = level * 10 + (*p - '0');
|
|
p++;
|
|
}
|
|
|
|
level *= sign;
|
|
DBG(1, "debug level %d\n", level);
|
|
debug = level;
|
|
}
|
|
}
|
|
break;
|
|
|
|
|
|
case '?':
|
|
INFO("?: you are seeing it\n");
|
|
INFO("C/c: soft connect enable/disable\n");
|
|
INFO("I/i: hispeed enable/disable\n");
|
|
INFO("F: force session start\n");
|
|
INFO("H: host mode\n");
|
|
INFO("T: start sending TEST_PACKET\n");
|
|
INFO("D: set/read dbug level\n");
|
|
break;
|
|
#endif
|
|
|
|
default:
|
|
ERR("Command %c not implemented\n", cmd);
|
|
break;
|
|
}
|
|
|
|
musb_platform_try_idle(musb, 0);
|
|
|
|
return count;
|
|
}
|
|
|
|
static int musb_proc_read(char *page, char **start,
|
|
off_t off, int count, int *eof, void *data)
|
|
{
|
|
char *buffer = page;
|
|
int code = 0;
|
|
unsigned long flags;
|
|
struct musb *musb = data;
|
|
unsigned epnum;
|
|
|
|
count -= off;
|
|
count -= 1; /* for NUL at end */
|
|
if (count <= 0)
|
|
return -EINVAL;
|
|
|
|
spin_lock_irqsave(&musb->lock, flags);
|
|
|
|
code = dump_header_stats(musb, buffer);
|
|
if (code > 0) {
|
|
buffer += code;
|
|
count -= code;
|
|
}
|
|
|
|
/* generate the report for the end points */
|
|
/* REVISIT ... not unless something's connected! */
|
|
for (epnum = 0; count >= 0 && epnum < musb->nr_endpoints;
|
|
epnum++) {
|
|
code = dump_end_info(musb, epnum, buffer, count);
|
|
if (code > 0) {
|
|
buffer += code;
|
|
count -= code;
|
|
}
|
|
}
|
|
|
|
musb_platform_try_idle(musb, 0);
|
|
|
|
spin_unlock_irqrestore(&musb->lock, flags);
|
|
*eof = 1;
|
|
|
|
return buffer - page;
|
|
}
|
|
|
|
void __devexit musb_debug_delete(char *name, struct musb *musb)
|
|
{
|
|
if (musb->proc_entry)
|
|
remove_proc_entry(name, NULL);
|
|
}
|
|
|
|
struct proc_dir_entry *__init
|
|
musb_debug_create(char *name, struct musb *data)
|
|
{
|
|
struct proc_dir_entry *pde;
|
|
|
|
/* FIXME convert everything to seq_file; then later, debugfs */
|
|
|
|
if (!name)
|
|
return NULL;
|
|
|
|
pde = create_proc_entry(name, S_IFREG | S_IRUGO | S_IWUSR, NULL);
|
|
data->proc_entry = pde;
|
|
if (pde) {
|
|
pde->data = data;
|
|
/* pde->owner = THIS_MODULE; */
|
|
|
|
pde->read_proc = musb_proc_read;
|
|
pde->write_proc = musb_proc_write;
|
|
|
|
pde->size = 0;
|
|
|
|
pr_debug("Registered /proc/%s\n", name);
|
|
} else {
|
|
pr_debug("Cannot create a valid proc file entry");
|
|
}
|
|
|
|
return pde;
|
|
}
|