51533b615e
New CRIS sub architecture named v32. From: Dave Jones <davej@redhat.com> Fix swapped kmalloc args Signed-off-by: Mikael Starvik <starvik@axis.com> Signed-off-by: Dave Jones <davej@redhat.com> Signed-off-by: Andrew Morton <akpm@osdl.org> Signed-off-by: Linus Torvalds <torvalds@osdl.org>
79 lines
1.7 KiB
C
79 lines
1.7 KiB
C
#ifndef __SUPP_REG_H__
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#define __SUPP_REG_H__
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/* Macros for reading and writing support/special registers. */
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#ifndef STRINGIFYFY
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#define STRINGIFYFY(i) #i
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#endif
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#ifndef STRINGIFY
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#define STRINGIFY(i) STRINGIFYFY(i)
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#endif
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#define SPEC_REG_BZ "BZ"
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#define SPEC_REG_VR "VR"
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#define SPEC_REG_PID "PID"
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#define SPEC_REG_SRS "SRS"
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#define SPEC_REG_WZ "WZ"
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#define SPEC_REG_EXS "EXS"
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#define SPEC_REG_EDA "EDA"
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#define SPEC_REG_MOF "MOF"
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#define SPEC_REG_DZ "DZ"
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#define SPEC_REG_EBP "EBP"
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#define SPEC_REG_ERP "ERP"
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#define SPEC_REG_SRP "SRP"
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#define SPEC_REG_NRP "NRP"
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#define SPEC_REG_CCS "CCS"
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#define SPEC_REG_USP "USP"
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#define SPEC_REG_SPC "SPC"
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#define RW_MM_CFG 0
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#define RW_MM_KBASE_LO 1
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#define RW_MM_KBASE_HI 2
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#define RW_MM_CAUSE 3
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#define RW_MM_TLB_SEL 4
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#define RW_MM_TLB_LO 5
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#define RW_MM_TLB_HI 6
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#define RW_MM_TLB_PGD 7
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#define BANK_GC 0
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#define BANK_IM 1
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#define BANK_DM 2
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#define BANK_BP 3
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#define RW_GC_CFG 0
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#define RW_GC_CCS 1
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#define RW_GC_SRS 2
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#define RW_GC_NRP 3
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#define RW_GC_EXS 4
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#define RW_GC_R0 8
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#define RW_GC_R1 9
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#define SPEC_REG_WR(r,v) \
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__asm__ __volatile__ ("move %0, $" r : : "r" (v));
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#define SPEC_REG_RD(r,v) \
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__asm__ __volatile__ ("move $" r ",%0" : "=r" (v));
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#define NOP() \
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__asm__ __volatile__ ("nop");
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#define SUPP_BANK_SEL(b) \
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SPEC_REG_WR(SPEC_REG_SRS,b); \
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NOP(); \
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NOP(); \
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NOP();
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#define SUPP_REG_WR(r,v) \
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__asm__ __volatile__ ("move %0, $S" STRINGIFYFY(r) "\n\t" \
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"nop\n\t" \
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"nop\n\t" \
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"nop\n\t" \
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: : "r" (v));
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#define SUPP_REG_RD(r,v) \
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__asm__ __volatile__ ("move $S" STRINGIFYFY(r) ",%0" : "=r" (v));
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#endif /* __SUPP_REG_H__ */
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