0d08a84770
There will be more product numbers in the future than just PA6T-1682M, but they will share much of the features. Remove some of the explicit references and compatibility checks with 1682M, and replace most of them with the more generic term "PWRficient". Signed-off-by: Olof Johansson <olof@lixom.net> Acked-by: Michael Buesch <mb@bu3sch.de> Acked-by: Doug Thompson <dougthompson@xmission.com>
318 lines
7.2 KiB
C
318 lines
7.2 KiB
C
/*
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* Copyright (C) 2007 PA Semi, Inc
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*
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* Authors: Egor Martovetsky <egor@pasemi.com>
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* Olof Johansson <olof@lixom.net>
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*
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* Maintained by: Olof Johansson <olof@lixom.net>
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*
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* Based on arch/powerpc/platforms/cell/cbe_cpufreq.c:
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* (C) Copyright IBM Deutschland Entwicklung GmbH 2005
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation; either version 2, or (at your option)
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* any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, write to the Free Software
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* Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
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*
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*/
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#include <linux/cpufreq.h>
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#include <linux/timer.h>
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#include <asm/hw_irq.h>
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#include <asm/io.h>
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#include <asm/prom.h>
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#include <asm/time.h>
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#define SDCASR_REG 0x0100
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#define SDCASR_REG_STRIDE 0x1000
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#define SDCPWR_CFGA0_REG 0x0100
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#define SDCPWR_PWST0_REG 0x0000
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#define SDCPWR_GIZTIME_REG 0x0440
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/* SDCPWR_GIZTIME_REG fields */
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#define SDCPWR_GIZTIME_GR 0x80000000
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#define SDCPWR_GIZTIME_LONGLOCK 0x000000ff
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/* Offset of ASR registers from SDC base */
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#define SDCASR_OFFSET 0x120000
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static void __iomem *sdcpwr_mapbase;
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static void __iomem *sdcasr_mapbase;
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static DEFINE_MUTEX(pas_switch_mutex);
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/* Current astate, is used when waking up from power savings on
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* one core, in case the other core has switched states during
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* the idle time.
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*/
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static int current_astate;
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/* We support 5(A0-A4) power states excluding turbo(A5-A6) modes */
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static struct cpufreq_frequency_table pas_freqs[] = {
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{0, 0},
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{1, 0},
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{2, 0},
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{3, 0},
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{4, 0},
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{0, CPUFREQ_TABLE_END},
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};
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static struct freq_attr *pas_cpu_freqs_attr[] = {
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&cpufreq_freq_attr_scaling_available_freqs,
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NULL,
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};
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/*
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* hardware specific functions
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*/
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static int get_astate_freq(int astate)
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{
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u32 ret;
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ret = in_le32(sdcpwr_mapbase + SDCPWR_CFGA0_REG + (astate * 0x10));
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return ret & 0x3f;
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}
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static int get_cur_astate(int cpu)
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{
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u32 ret;
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ret = in_le32(sdcpwr_mapbase + SDCPWR_PWST0_REG);
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ret = (ret >> (cpu * 4)) & 0x7;
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return ret;
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}
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static int get_gizmo_latency(void)
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{
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u32 giztime, ret;
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giztime = in_le32(sdcpwr_mapbase + SDCPWR_GIZTIME_REG);
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/* just provide the upper bound */
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if (giztime & SDCPWR_GIZTIME_GR)
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ret = (giztime & SDCPWR_GIZTIME_LONGLOCK) * 128000;
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else
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ret = (giztime & SDCPWR_GIZTIME_LONGLOCK) * 1000;
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return ret;
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}
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static void set_astate(int cpu, unsigned int astate)
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{
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u64 flags;
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/* Return if called before init has run */
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if (unlikely(!sdcasr_mapbase))
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return;
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local_irq_save(flags);
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out_le32(sdcasr_mapbase + SDCASR_REG + SDCASR_REG_STRIDE*cpu, astate);
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local_irq_restore(flags);
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}
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void restore_astate(int cpu)
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{
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set_astate(cpu, current_astate);
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}
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/*
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* cpufreq functions
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*/
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static int pas_cpufreq_cpu_init(struct cpufreq_policy *policy)
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{
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const u32 *max_freqp;
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u32 max_freq;
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int i, cur_astate;
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struct resource res;
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struct device_node *cpu, *dn;
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int err = -ENODEV;
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cpu = of_get_cpu_node(policy->cpu, NULL);
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if (!cpu)
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goto out;
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dn = of_find_compatible_node(NULL, NULL, "1682m-sdc");
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if (!dn)
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dn = of_find_compatible_node(NULL, NULL,
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"pasemi,pwrficient-sdc");
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if (!dn)
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goto out;
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err = of_address_to_resource(dn, 0, &res);
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of_node_put(dn);
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if (err)
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goto out;
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sdcasr_mapbase = ioremap(res.start + SDCASR_OFFSET, 0x2000);
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if (!sdcasr_mapbase) {
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err = -EINVAL;
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goto out;
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}
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dn = of_find_compatible_node(NULL, NULL, "1682m-gizmo");
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if (!dn)
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dn = of_find_compatible_node(NULL, NULL,
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"pasemi,pwrficient-gizmo");
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if (!dn) {
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err = -ENODEV;
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goto out_unmap_sdcasr;
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}
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err = of_address_to_resource(dn, 0, &res);
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of_node_put(dn);
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if (err)
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goto out_unmap_sdcasr;
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sdcpwr_mapbase = ioremap(res.start, 0x1000);
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if (!sdcpwr_mapbase) {
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err = -EINVAL;
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goto out_unmap_sdcasr;
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}
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pr_debug("init cpufreq on CPU %d\n", policy->cpu);
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max_freqp = of_get_property(cpu, "clock-frequency", NULL);
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if (!max_freqp) {
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err = -EINVAL;
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goto out_unmap_sdcpwr;
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}
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/* we need the freq in kHz */
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max_freq = *max_freqp / 1000;
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pr_debug("max clock-frequency is at %u kHz\n", max_freq);
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pr_debug("initializing frequency table\n");
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/* initialize frequency table */
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for (i=0; pas_freqs[i].frequency!=CPUFREQ_TABLE_END; i++) {
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pas_freqs[i].frequency = get_astate_freq(pas_freqs[i].index) * 100000;
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pr_debug("%d: %d\n", i, pas_freqs[i].frequency);
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}
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policy->cpuinfo.transition_latency = get_gizmo_latency();
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cur_astate = get_cur_astate(policy->cpu);
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pr_debug("current astate is at %d\n",cur_astate);
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policy->cur = pas_freqs[cur_astate].frequency;
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policy->cpus = cpu_online_map;
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ppc_proc_freq = policy->cur * 1000ul;
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cpufreq_frequency_table_get_attr(pas_freqs, policy->cpu);
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/* this ensures that policy->cpuinfo_min and policy->cpuinfo_max
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* are set correctly
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*/
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return cpufreq_frequency_table_cpuinfo(policy, pas_freqs);
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out_unmap_sdcpwr:
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iounmap(sdcpwr_mapbase);
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out_unmap_sdcasr:
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iounmap(sdcasr_mapbase);
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out:
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return err;
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}
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static int pas_cpufreq_cpu_exit(struct cpufreq_policy *policy)
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{
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if (sdcasr_mapbase)
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iounmap(sdcasr_mapbase);
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if (sdcpwr_mapbase)
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iounmap(sdcpwr_mapbase);
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cpufreq_frequency_table_put_attr(policy->cpu);
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return 0;
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}
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static int pas_cpufreq_verify(struct cpufreq_policy *policy)
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{
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return cpufreq_frequency_table_verify(policy, pas_freqs);
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}
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static int pas_cpufreq_target(struct cpufreq_policy *policy,
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unsigned int target_freq,
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unsigned int relation)
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{
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struct cpufreq_freqs freqs;
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int pas_astate_new;
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int i;
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cpufreq_frequency_table_target(policy,
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pas_freqs,
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target_freq,
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relation,
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&pas_astate_new);
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freqs.old = policy->cur;
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freqs.new = pas_freqs[pas_astate_new].frequency;
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freqs.cpu = policy->cpu;
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mutex_lock(&pas_switch_mutex);
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cpufreq_notify_transition(&freqs, CPUFREQ_PRECHANGE);
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pr_debug("setting frequency for cpu %d to %d kHz, 1/%d of max frequency\n",
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policy->cpu,
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pas_freqs[pas_astate_new].frequency,
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pas_freqs[pas_astate_new].index);
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current_astate = pas_astate_new;
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for_each_online_cpu(i)
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set_astate(i, pas_astate_new);
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cpufreq_notify_transition(&freqs, CPUFREQ_POSTCHANGE);
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mutex_unlock(&pas_switch_mutex);
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ppc_proc_freq = freqs.new * 1000ul;
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return 0;
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}
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static struct cpufreq_driver pas_cpufreq_driver = {
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.name = "pas-cpufreq",
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.owner = THIS_MODULE,
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.flags = CPUFREQ_CONST_LOOPS,
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.init = pas_cpufreq_cpu_init,
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.exit = pas_cpufreq_cpu_exit,
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.verify = pas_cpufreq_verify,
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.target = pas_cpufreq_target,
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.attr = pas_cpu_freqs_attr,
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};
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/*
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* module init and destoy
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*/
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static int __init pas_cpufreq_init(void)
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{
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if (!machine_is_compatible("PA6T-1682M") &&
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!machine_is_compatible("pasemi,pwrficient"))
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return -ENODEV;
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return cpufreq_register_driver(&pas_cpufreq_driver);
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}
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static void __exit pas_cpufreq_exit(void)
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{
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cpufreq_unregister_driver(&pas_cpufreq_driver);
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}
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module_init(pas_cpufreq_init);
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module_exit(pas_cpufreq_exit);
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MODULE_LICENSE("GPL");
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MODULE_AUTHOR("Egor Martovetsky <egor@pasemi.com>, Olof Johansson <olof@lixom.net>");
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