android_kernel_xiaomi_sm8350/arch/ia64/mm
Jack Steiner cfbb1426bd [IA64] Hole in IA64 TLB flushing from system threads
I originally thought this was an bug only in the SN code, but I think I
also see a hole in the generic IA64 tlb code. (Separate patch was sent
for the SN problem).

It looks like there is a bug in the TLB flushing code. During context switch,
kernel threads (kswapd, for example) inherit the mm of the task that was
previously running on the cpu. Normally, this is ok because the previous context
is still loaded into the RR registers. However, if the owner of the mm
migrates to another cpu, changes it's context number, and references a
page before kswapd issues a tlb_purge for that same page, the purge will be
done with a stale context number (& RR registers).

Signed-off-by: Tony Luck <tony.luck@intel.com>
2006-01-13 14:10:06 -08:00
..
contig.c [PATCH] V5 ia64 SPARSEMEM - eliminate contig_page_data 2005-10-04 13:20:23 -07:00
discontig.c [IA64] Limit the maximum NODEDATA_ALIGN() offset 2005-12-06 09:10:37 -08:00
extable.c
fault.c [PATCH] mm: ia64 use expand_upwards 2005-10-29 21:40:39 -07:00
hugetlbpage.c
init.c [PATCH] mm: init_mm without ptlock 2005-10-29 21:40:40 -07:00
Makefile [PATCH] V5 ia64 SPARSEMEM - Kconfig and Makefile 2005-10-04 13:19:30 -07:00
numa.c [PATCH] V5 ia64 SPARSEMEM - SPARSEMEM code changes 2005-10-04 13:21:38 -07:00
tlb.c [IA64] Hole in IA64 TLB flushing from system threads 2006-01-13 14:10:06 -08:00