49b4ff3304
Spelling fixes in arch/cris/. Signed-off-by: Simon Arlott <simon@fire.lp0.eu> Signed-off-by: Adrian Bunk <bunk@kernel.org>
456 lines
12 KiB
C
456 lines
12 KiB
C
/*
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* Physical mapping layer for MTD using the Axis partitiontable format
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*
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* Copyright (c) 2001, 2002, 2003 Axis Communications AB
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*
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* This file is under the GPL.
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*
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* First partition is always sector 0 regardless of if we find a partitiontable
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* or not. In the start of the next sector, there can be a partitiontable that
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* tells us what other partitions to define. If there isn't, we use a default
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* partition split defined below.
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*
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* Copy of os/lx25/arch/cris/arch-v10/drivers/axisflashmap.c 1.5
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* with minor changes.
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*
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*/
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#include <linux/module.h>
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#include <linux/types.h>
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#include <linux/kernel.h>
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#include <linux/init.h>
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#include <linux/slab.h>
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#include <linux/mtd/concat.h>
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#include <linux/mtd/map.h>
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#include <linux/mtd/mtd.h>
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#include <linux/mtd/mtdram.h>
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#include <linux/mtd/partitions.h>
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#include <asm/arch/hwregs/config_defs.h>
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#include <asm/axisflashmap.h>
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#include <asm/mmu.h>
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#define MEM_CSE0_SIZE (0x04000000)
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#define MEM_CSE1_SIZE (0x04000000)
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#define FLASH_UNCACHED_ADDR KSEG_E
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#define FLASH_CACHED_ADDR KSEG_F
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#if CONFIG_ETRAX_FLASH_BUSWIDTH==1
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#define flash_data __u8
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#elif CONFIG_ETRAX_FLASH_BUSWIDTH==2
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#define flash_data __u16
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#elif CONFIG_ETRAX_FLASH_BUSWIDTH==4
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#define flash_data __u16
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#endif
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/* From head.S */
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extern unsigned long romfs_start, romfs_length, romfs_in_flash;
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/* The master mtd for the entire flash. */
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struct mtd_info* axisflash_mtd = NULL;
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/* Map driver functions. */
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static map_word flash_read(struct map_info *map, unsigned long ofs)
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{
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map_word tmp;
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tmp.x[0] = *(flash_data *)(map->map_priv_1 + ofs);
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return tmp;
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}
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static void flash_copy_from(struct map_info *map, void *to,
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unsigned long from, ssize_t len)
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{
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memcpy(to, (void *)(map->map_priv_1 + from), len);
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}
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static void flash_write(struct map_info *map, map_word d, unsigned long adr)
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{
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*(flash_data *)(map->map_priv_1 + adr) = (flash_data)d.x[0];
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}
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/*
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* The map for chip select e0.
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*
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* We run into tricky coherence situations if we mix cached with uncached
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* accesses to we only use the uncached version here.
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*
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* The size field is the total size where the flash chips may be mapped on the
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* chip select. MTD probes should find all devices there and it does not matter
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* if there are unmapped gaps or aliases (mirrors of flash devices). The MTD
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* probes will ignore them.
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*
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* The start address in map_priv_1 is in virtual memory so we cannot use
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* MEM_CSE0_START but must rely on that FLASH_UNCACHED_ADDR is the start
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* address of cse0.
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*/
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static struct map_info map_cse0 = {
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.name = "cse0",
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.size = MEM_CSE0_SIZE,
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.bankwidth = CONFIG_ETRAX_FLASH_BUSWIDTH,
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.read = flash_read,
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.copy_from = flash_copy_from,
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.write = flash_write,
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.map_priv_1 = FLASH_UNCACHED_ADDR
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};
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/*
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* The map for chip select e1.
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*
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* If there was a gap between cse0 and cse1, map_priv_1 would get the wrong
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* address, but there isn't.
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*/
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static struct map_info map_cse1 = {
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.name = "cse1",
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.size = MEM_CSE1_SIZE,
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.bankwidth = CONFIG_ETRAX_FLASH_BUSWIDTH,
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.read = flash_read,
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.copy_from = flash_copy_from,
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.write = flash_write,
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.map_priv_1 = FLASH_UNCACHED_ADDR + MEM_CSE0_SIZE
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};
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/* If no partition-table was found, we use this default-set. */
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#define MAX_PARTITIONS 7
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#define NUM_DEFAULT_PARTITIONS 3
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/*
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* Default flash size is 2MB. CONFIG_ETRAX_PTABLE_SECTOR is most likely the
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* size of one flash block and "filesystem"-partition needs 5 blocks to be able
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* to use JFFS.
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*/
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static struct mtd_partition axis_default_partitions[NUM_DEFAULT_PARTITIONS] = {
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{
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.name = "boot firmware",
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.size = CONFIG_ETRAX_PTABLE_SECTOR,
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.offset = 0
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},
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{
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.name = "kernel",
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.size = 0x200000 - (6 * CONFIG_ETRAX_PTABLE_SECTOR),
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.offset = CONFIG_ETRAX_PTABLE_SECTOR
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},
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{
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.name = "filesystem",
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.size = 5 * CONFIG_ETRAX_PTABLE_SECTOR,
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.offset = 0x200000 - (5 * CONFIG_ETRAX_PTABLE_SECTOR)
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}
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};
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/* Initialize the ones normally used. */
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static struct mtd_partition axis_partitions[MAX_PARTITIONS] = {
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{
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.name = "part0",
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.size = CONFIG_ETRAX_PTABLE_SECTOR,
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.offset = 0
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},
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{
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.name = "part1",
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.size = 0,
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.offset = 0
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},
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{
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.name = "part2",
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.size = 0,
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.offset = 0
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},
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{
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.name = "part3",
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.size = 0,
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.offset = 0
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},
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{
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.name = "part4",
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.size = 0,
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.offset = 0
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},
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{
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.name = "part5",
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.size = 0,
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.offset = 0
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},
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{
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.name = "part6",
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.size = 0,
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.offset = 0
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},
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};
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/*
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* Probe a chip select for AMD-compatible (JEDEC) or CFI-compatible flash
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* chips in that order (because the amd_flash-driver is faster).
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*/
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static struct mtd_info *probe_cs(struct map_info *map_cs)
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{
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struct mtd_info *mtd_cs = NULL;
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printk(KERN_INFO
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"%s: Probing a 0x%08lx bytes large window at 0x%08lx.\n",
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map_cs->name, map_cs->size, map_cs->map_priv_1);
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#ifdef CONFIG_MTD_AMDSTD
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mtd_cs = do_map_probe("amd_flash", map_cs);
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#endif
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#ifdef CONFIG_MTD_CFI
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if (!mtd_cs) {
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mtd_cs = do_map_probe("cfi_probe", map_cs);
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}
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#endif
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return mtd_cs;
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}
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/*
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* Probe each chip select individually for flash chips. If there are chips on
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* both cse0 and cse1, the mtd_info structs will be concatenated to one struct
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* so that MTD partitions can cross chip boundaries.
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*
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* The only known restriction to how you can mount your chips is that each
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* chip select must hold similar flash chips. But you need external hardware
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* to do that anyway and you can put totally different chips on cse0 and cse1
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* so it isn't really much of a restriction.
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*/
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extern struct mtd_info* __init crisv32_nand_flash_probe (void);
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static struct mtd_info *flash_probe(void)
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{
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struct mtd_info *mtd_cse0;
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struct mtd_info *mtd_cse1;
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struct mtd_info *mtd_nand = NULL;
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struct mtd_info *mtd_total;
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struct mtd_info *mtds[3];
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int count = 0;
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if ((mtd_cse0 = probe_cs(&map_cse0)) != NULL)
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mtds[count++] = mtd_cse0;
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if ((mtd_cse1 = probe_cs(&map_cse1)) != NULL)
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mtds[count++] = mtd_cse1;
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#ifdef CONFIG_ETRAX_NANDFLASH
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if ((mtd_nand = crisv32_nand_flash_probe()) != NULL)
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mtds[count++] = mtd_nand;
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#endif
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if (!mtd_cse0 && !mtd_cse1 && !mtd_nand) {
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/* No chip found. */
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return NULL;
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}
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if (count > 1) {
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#ifdef CONFIG_MTD_CONCAT
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/* Since the concatenation layer adds a small overhead we
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* could try to figure out if the chips in cse0 and cse1 are
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* identical and reprobe the whole cse0+cse1 window. But since
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* flash chips are slow, the overhead is relatively small.
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* So we use the MTD concatenation layer instead of further
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* complicating the probing procedure.
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*/
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mtd_total = mtd_concat_create(mtds,
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count,
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"cse0+cse1+nand");
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#else
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printk(KERN_ERR "%s and %s: Cannot concatenate due to kernel "
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"(mis)configuration!\n", map_cse0.name, map_cse1.name);
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mtd_toal = NULL;
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#endif
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if (!mtd_total) {
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printk(KERN_ERR "%s and %s: Concatenation failed!\n",
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map_cse0.name, map_cse1.name);
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/* The best we can do now is to only use what we found
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* at cse0.
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*/
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mtd_total = mtd_cse0;
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map_destroy(mtd_cse1);
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}
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} else {
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mtd_total = mtd_cse0? mtd_cse0 : mtd_cse1 ? mtd_cse1 : mtd_nand;
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}
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return mtd_total;
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}
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extern unsigned long crisv32_nand_boot;
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extern unsigned long crisv32_nand_cramfs_offset;
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/*
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* Probe the flash chip(s) and, if it succeeds, read the partition-table
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* and register the partitions with MTD.
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*/
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static int __init init_axis_flash(void)
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{
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struct mtd_info *mymtd;
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int err = 0;
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int pidx = 0;
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struct partitiontable_head *ptable_head = NULL;
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struct partitiontable_entry *ptable;
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int use_default_ptable = 1; /* Until proven otherwise. */
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const char *pmsg = KERN_INFO " /dev/flash%d at 0x%08x, size 0x%08x\n";
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static char page[512];
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size_t len;
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#ifndef CONFIG_ETRAXFS_SIM
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mymtd = flash_probe();
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mymtd->read(mymtd, CONFIG_ETRAX_PTABLE_SECTOR, 512, &len, page);
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ptable_head = (struct partitiontable_head *)(page + PARTITION_TABLE_OFFSET);
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if (!mymtd) {
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/* There's no reason to use this module if no flash chip can
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* be identified. Make sure that's understood.
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*/
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printk(KERN_INFO "axisflashmap: Found no flash chip.\n");
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} else {
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printk(KERN_INFO "%s: 0x%08x bytes of flash memory.\n",
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mymtd->name, mymtd->size);
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axisflash_mtd = mymtd;
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}
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if (mymtd) {
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mymtd->owner = THIS_MODULE;
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}
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pidx++; /* First partition is always set to the default. */
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if (ptable_head && (ptable_head->magic == PARTITION_TABLE_MAGIC)
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&& (ptable_head->size <
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(MAX_PARTITIONS * sizeof(struct partitiontable_entry) +
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PARTITIONTABLE_END_MARKER_SIZE))
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&& (*(unsigned long*)((void*)ptable_head + sizeof(*ptable_head) +
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ptable_head->size -
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PARTITIONTABLE_END_MARKER_SIZE)
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== PARTITIONTABLE_END_MARKER)) {
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/* Looks like a start, sane length and end of a
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* partition table, lets check csum etc.
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*/
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int ptable_ok = 0;
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struct partitiontable_entry *max_addr =
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(struct partitiontable_entry *)
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((unsigned long)ptable_head + sizeof(*ptable_head) +
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ptable_head->size);
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unsigned long offset = CONFIG_ETRAX_PTABLE_SECTOR;
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unsigned char *p;
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unsigned long csum = 0;
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ptable = (struct partitiontable_entry *)
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((unsigned long)ptable_head + sizeof(*ptable_head));
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/* Lets be PARANOID, and check the checksum. */
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p = (unsigned char*) ptable;
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while (p <= (unsigned char*)max_addr) {
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csum += *p++;
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csum += *p++;
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csum += *p++;
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csum += *p++;
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}
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ptable_ok = (csum == ptable_head->checksum);
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/* Read the entries and use/show the info. */
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printk(KERN_INFO " Found a%s partition table at 0x%p-0x%p.\n",
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(ptable_ok ? " valid" : "n invalid"), ptable_head,
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max_addr);
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/* We have found a working bootblock. Now read the
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* partition table. Scan the table. It ends when
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* there is 0xffffffff, that is, empty flash.
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*/
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while (ptable_ok
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&& ptable->offset != 0xffffffff
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&& ptable < max_addr
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&& pidx < MAX_PARTITIONS) {
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axis_partitions[pidx].offset = offset + ptable->offset + (crisv32_nand_boot ? 16384 : 0);
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axis_partitions[pidx].size = ptable->size;
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printk(pmsg, pidx, axis_partitions[pidx].offset,
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axis_partitions[pidx].size);
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pidx++;
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ptable++;
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}
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use_default_ptable = !ptable_ok;
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}
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if (romfs_in_flash) {
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/* Add an overlapping device for the root partition (romfs). */
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axis_partitions[pidx].name = "romfs";
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if (crisv32_nand_boot) {
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char* data = kmalloc(1024, GFP_KERNEL);
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int len;
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int offset = crisv32_nand_cramfs_offset & ~(1024-1);
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char* tmp;
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mymtd->read(mymtd, offset, 1024, &len, data);
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tmp = &data[crisv32_nand_cramfs_offset % 512];
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axis_partitions[pidx].size = *(unsigned*)(tmp + 4);
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axis_partitions[pidx].offset = crisv32_nand_cramfs_offset;
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kfree(data);
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} else {
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axis_partitions[pidx].size = romfs_length;
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axis_partitions[pidx].offset = romfs_start - FLASH_CACHED_ADDR;
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}
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axis_partitions[pidx].mask_flags |= MTD_WRITEABLE;
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printk(KERN_INFO
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" Adding readonly flash partition for romfs image:\n");
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printk(pmsg, pidx, axis_partitions[pidx].offset,
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axis_partitions[pidx].size);
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pidx++;
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}
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if (mymtd) {
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if (use_default_ptable) {
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printk(KERN_INFO " Using default partition table.\n");
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err = add_mtd_partitions(mymtd, axis_default_partitions,
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NUM_DEFAULT_PARTITIONS);
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} else {
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err = add_mtd_partitions(mymtd, axis_partitions, pidx);
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}
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if (err) {
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panic("axisflashmap could not add MTD partitions!\n");
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}
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}
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/* CONFIG_EXTRAXFS_SIM */
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#endif
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if (!romfs_in_flash) {
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/* Create an RAM device for the root partition (romfs). */
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#if !defined(CONFIG_MTD_MTDRAM) || (CONFIG_MTDRAM_TOTAL_SIZE != 0) || (CONFIG_MTDRAM_ABS_POS != 0)
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/* No use trying to boot this kernel from RAM. Panic! */
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printk(KERN_EMERG "axisflashmap: Cannot create an MTD RAM "
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"device due to kernel (mis)configuration!\n");
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panic("This kernel cannot boot from RAM!\n");
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#else
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struct mtd_info *mtd_ram;
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mtd_ram = kmalloc(sizeof(struct mtd_info),
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GFP_KERNEL);
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if (!mtd_ram) {
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panic("axisflashmap couldn't allocate memory for "
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"mtd_info!\n");
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}
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printk(KERN_INFO " Adding RAM partition for romfs image:\n");
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printk(pmsg, pidx, romfs_start, romfs_length);
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err = mtdram_init_device(mtd_ram, (void*)romfs_start,
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romfs_length, "romfs");
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if (err) {
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panic("axisflashmap could not initialize MTD RAM "
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"device!\n");
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}
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#endif
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}
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return err;
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}
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/* This adds the above to the kernels init-call chain. */
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module_init(init_axis_flash);
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EXPORT_SYMBOL(axisflash_mtd);
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