11d1578f94
Add basic P6 PMU support. The P6 uses the EVNTSEL0 EN bit to enable/disable both its counters. We use this for the global enable/disable, and clear all config bits (except EN) to disable individual counters. Actual ia32 hardware doesn't support lfence, so use a locked op without side-effect to implement a full barrier. perf stat and perf record seem to function correctly. [a.p.zijlstra@chello.nl: cleanups and complete the enable/disable code] Signed-off-by: Vince Weaver <vince@deater.net> Signed-off-by: Peter Zijlstra <a.p.zijlstra@chello.nl> LKML-Reference: <Pine.LNX.4.64.0907081718450.2715@pianoman.cluster.toy> Signed-off-by: Ingo Molnar <mingo@elte.hu> |
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.. | ||
cpufreq | ||
mcheck | ||
mtrr | ||
.gitignore | ||
addon_cpuid_features.c | ||
amd.c | ||
bugs_64.c | ||
bugs.c | ||
centaur.c | ||
cmpxchg.c | ||
common.c | ||
cpu_debug.c | ||
cpu.h | ||
cyrix.c | ||
hypervisor.c | ||
intel_cacheinfo.c | ||
intel.c | ||
Makefile | ||
mkcapflags.pl | ||
perf_counter.c | ||
perfctr-watchdog.c | ||
powerflags.c | ||
proc.c | ||
transmeta.c | ||
umc.c | ||
vmware.c |