249bb070f5
Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de>
205 lines
5.2 KiB
C
205 lines
5.2 KiB
C
/*
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i2c-savage4.c - Part of lm_sensors, Linux kernel modules for hardware
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monitoring
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Copyright (C) 1998-2003 The LM Sensors Team
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Alexander Wold <awold@bigfoot.com>
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Mark D. Studebaker <mdsxyz123@yahoo.com>
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Based on i2c-voodoo3.c.
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This program is free software; you can redistribute it and/or modify
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it under the terms of the GNU General Public License as published by
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the Free Software Foundation; either version 2 of the License, or
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(at your option) any later version.
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This program is distributed in the hope that it will be useful,
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but WITHOUT ANY WARRANTY; without even the implied warranty of
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MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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GNU General Public License for more details.
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You should have received a copy of the GNU General Public License
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along with this program; if not, write to the Free Software
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Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
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*/
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/* This interfaces to the I2C bus of the Savage4 to gain access to
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the BT869 and possibly other I2C devices. The DDC bus is not
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yet supported because its register is not memory-mapped.
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However we leave the DDC code here, commented out, to make
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it easier to add later.
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*/
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#include <linux/kernel.h>
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#include <linux/module.h>
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#include <linux/init.h>
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#include <linux/pci.h>
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#include <linux/i2c.h>
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#include <linux/i2c-algo-bit.h>
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#include <asm/io.h>
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/* 3DFX defines */
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#define PCI_CHIP_SAVAGE3D 0x8A20
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#define PCI_CHIP_SAVAGE3D_MV 0x8A21
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#define PCI_CHIP_SAVAGE4 0x8A22
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#define PCI_CHIP_SAVAGE2000 0x9102
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#define PCI_CHIP_PROSAVAGE_PM 0x8A25
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#define PCI_CHIP_PROSAVAGE_KM 0x8A26
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#define PCI_CHIP_SAVAGE_MX_MV 0x8c10
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#define PCI_CHIP_SAVAGE_MX 0x8c11
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#define PCI_CHIP_SAVAGE_IX_MV 0x8c12
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#define PCI_CHIP_SAVAGE_IX 0x8c13
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#define REG 0xff20 /* Serial Port 1 Register */
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/* bit locations in the register */
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#define DDC_ENAB 0x00040000
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#define DDC_SCL_OUT 0x00080000
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#define DDC_SDA_OUT 0x00100000
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#define DDC_SCL_IN 0x00200000
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#define DDC_SDA_IN 0x00400000
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#define I2C_ENAB 0x00000020
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#define I2C_SCL_OUT 0x00000001
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#define I2C_SDA_OUT 0x00000002
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#define I2C_SCL_IN 0x00000008
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#define I2C_SDA_IN 0x00000010
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/* initialization states */
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#define INIT2 0x20
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#define INIT3 0x04
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/* delays */
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#define CYCLE_DELAY 10
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#define TIMEOUT (HZ / 2)
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static void __iomem *ioaddr;
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/* The sav GPIO registers don't have individual masks for each bit
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so we always have to read before writing. */
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static void bit_savi2c_setscl(void *data, int val)
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{
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unsigned int r;
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r = readl(ioaddr + REG);
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if(val)
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r |= I2C_SCL_OUT;
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else
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r &= ~I2C_SCL_OUT;
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writel(r, ioaddr + REG);
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readl(ioaddr + REG); /* flush posted write */
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}
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static void bit_savi2c_setsda(void *data, int val)
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{
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unsigned int r;
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r = readl(ioaddr + REG);
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if(val)
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r |= I2C_SDA_OUT;
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else
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r &= ~I2C_SDA_OUT;
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writel(r, ioaddr + REG);
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readl(ioaddr + REG); /* flush posted write */
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}
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/* The GPIO pins are open drain, so the pins always remain outputs.
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We rely on the i2c-algo-bit routines to set the pins high before
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reading the input from other chips. */
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static int bit_savi2c_getscl(void *data)
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{
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return (0 != (readl(ioaddr + REG) & I2C_SCL_IN));
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}
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static int bit_savi2c_getsda(void *data)
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{
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return (0 != (readl(ioaddr + REG) & I2C_SDA_IN));
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}
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/* Configures the chip */
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static int config_s4(struct pci_dev *dev)
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{
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unsigned long cadr;
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/* map memory */
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cadr = dev->resource[0].start;
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cadr &= PCI_BASE_ADDRESS_MEM_MASK;
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ioaddr = ioremap_nocache(cadr, 0x0080000);
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if (ioaddr) {
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/* writel(0x8160, ioaddr + REG2); */
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writel(0x00000020, ioaddr + REG);
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dev_info(&dev->dev, "Using Savage4 at %p\n", ioaddr);
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return 0;
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}
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return -ENODEV;
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}
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static struct i2c_algo_bit_data sav_i2c_bit_data = {
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.setsda = bit_savi2c_setsda,
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.setscl = bit_savi2c_setscl,
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.getsda = bit_savi2c_getsda,
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.getscl = bit_savi2c_getscl,
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.udelay = CYCLE_DELAY,
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.mdelay = CYCLE_DELAY,
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.timeout = TIMEOUT
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};
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static struct i2c_adapter savage4_i2c_adapter = {
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.owner = THIS_MODULE,
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.name = "I2C Savage4 adapter",
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.algo_data = &sav_i2c_bit_data,
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};
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static struct pci_device_id savage4_ids[] __devinitdata = {
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{ PCI_DEVICE(PCI_VENDOR_ID_S3, PCI_CHIP_SAVAGE4) },
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{ PCI_DEVICE(PCI_VENDOR_ID_S3, PCI_CHIP_SAVAGE2000) },
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{ 0, }
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};
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MODULE_DEVICE_TABLE (pci, savage4_ids);
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static int __devinit savage4_probe(struct pci_dev *dev, const struct pci_device_id *id)
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{
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int retval;
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retval = config_s4(dev);
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if (retval)
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return retval;
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/* set up the sysfs linkage to our parent device */
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savage4_i2c_adapter.dev.parent = &dev->dev;
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return i2c_bit_add_bus(&savage4_i2c_adapter);
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}
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static void __devexit savage4_remove(struct pci_dev *dev)
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{
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i2c_bit_del_bus(&savage4_i2c_adapter);
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iounmap(ioaddr);
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}
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static struct pci_driver savage4_driver = {
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.name = "savage4_smbus",
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.id_table = savage4_ids,
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.probe = savage4_probe,
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.remove = __devexit_p(savage4_remove),
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};
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static int __init i2c_savage4_init(void)
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{
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return pci_register_driver(&savage4_driver);
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}
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static void __exit i2c_savage4_exit(void)
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{
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pci_unregister_driver(&savage4_driver);
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}
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MODULE_AUTHOR("Alexander Wold <awold@bigfoot.com> "
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"and Mark D. Studebaker <mdsxyz123@yahoo.com>");
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MODULE_DESCRIPTION("Savage4 I2C/SMBus driver");
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MODULE_LICENSE("GPL");
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module_init(i2c_savage4_init);
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module_exit(i2c_savage4_exit);
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