a086536858
A strange variation was seen in the BogoMIPS figure for the ST40-300. This was eventually tracked down to sensitivity to the alignment of the loop. So add an align directive to ensure this doesn't occur. Signed-off-by: Stuart Menefy <stuart.menefy@st.com> Signed-off-by: Paul Mundt <lethal@linux-sh.org>
54 lines
1.0 KiB
C
54 lines
1.0 KiB
C
/*
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* Precise Delay Loops for SuperH
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*
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* Copyright (C) 1999 Niibe Yutaka & Kaz Kojima
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*/
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#include <linux/sched.h>
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#include <linux/delay.h>
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void __delay(unsigned long loops)
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{
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__asm__ __volatile__(
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/*
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* ST40-300 appears to have an issue with this code,
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* normally taking two cycles each loop, as with all
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* other SH variants. If however the branch and the
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* delay slot straddle an 8 byte boundary, this increases
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* to 3 cycles.
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* This align directive ensures this doesn't occur.
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*/
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".balign 8\n\t"
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"tst %0, %0\n\t"
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"1:\t"
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"bf/s 1b\n\t"
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" dt %0"
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: "=r" (loops)
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: "0" (loops)
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: "t");
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}
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inline void __const_udelay(unsigned long xloops)
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{
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xloops *= 4;
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__asm__("dmulu.l %0, %2\n\t"
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"sts mach, %0"
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: "=r" (xloops)
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: "0" (xloops),
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"r" (cpu_data[raw_smp_processor_id()].loops_per_jiffy * (HZ/4))
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: "macl", "mach");
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__delay(++xloops);
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}
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void __udelay(unsigned long usecs)
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{
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__const_udelay(usecs * 0x000010c6); /* 2**32 / 1000000 */
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}
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void __ndelay(unsigned long nsecs)
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{
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__const_udelay(nsecs * 0x00000005);
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}
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