99a5b2878b
Flushing caches sometimes requires anomaly workarounds which require supervisor-only insns. Normally we don't need to flush caches from userspace so this isn't a problem, but when gcc generates trampolines on the stack, we do. So add a new syscall for gcc to use modeled after the mips version. Signed-off-by: Sonic Zhang <sonic.zhang@analog.com> Signed-off-by: Mike Frysinger <vapier@gentoo.org>
21 lines
478 B
C
21 lines
478 B
C
/*
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* based on the mips/cachectl.h
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*
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* Copyright 2010 Analog Devices Inc.
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* Copyright (C) 1994, 1995, 1996 by Ralf Baechle
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*
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* Licensed under the GPL-2 or later.
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*/
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#ifndef _ASM_CACHECTL
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#define _ASM_CACHECTL
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/*
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* Options for cacheflush system call
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*/
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#define ICACHE (1<<0) /* flush instruction cache */
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#define DCACHE (1<<1) /* writeback and flush data cache */
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#define BCACHE (ICACHE|DCACHE) /* flush both caches */
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#endif /* _ASM_CACHECTL */
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