f0e46cc497
The Toshiba parts all have a 24 MHz HCLK, but HTC ASIC3 has a 24.576 MHz HCLK and AMD Imageon w228x's HCLK is 80 MHz. With this patch, the MFD driver provides the HCLK frequency to tmio_mmc via mfd_cell->driver_data. Signed-off-by: Philipp Zabel <philipp.zabel@gmail.com> Acked-by: Ian Molton <ian@mnementh.co.uk> Acked-by: Samuel Ortiz <sameo@openedhand.com> Signed-off-by: Pierre Ossman <pierre@ossman.eu>
55 lines
1.2 KiB
C
55 lines
1.2 KiB
C
#ifndef MFD_TMIO_H
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#define MFD_TMIO_H
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#include <linux/fb.h>
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#define tmio_ioread8(addr) readb(addr)
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#define tmio_ioread16(addr) readw(addr)
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#define tmio_ioread16_rep(r, b, l) readsw(r, b, l)
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#define tmio_ioread32(addr) \
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(((u32) readw((addr))) | (((u32) readw((addr) + 2)) << 16))
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#define tmio_iowrite8(val, addr) writeb((val), (addr))
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#define tmio_iowrite16(val, addr) writew((val), (addr))
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#define tmio_iowrite16_rep(r, b, l) writesw(r, b, l)
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#define tmio_iowrite32(val, addr) \
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do { \
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writew((val), (addr)); \
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writew((val) >> 16, (addr) + 2); \
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} while (0)
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/*
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* data for the MMC controller
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*/
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struct tmio_mmc_data {
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unsigned int hclk;
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};
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/*
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* data for the NAND controller
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*/
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struct tmio_nand_data {
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struct nand_bbt_descr *badblock_pattern;
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struct mtd_partition *partition;
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unsigned int num_partitions;
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};
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#define FBIO_TMIO_ACC_WRITE 0x7C639300
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#define FBIO_TMIO_ACC_SYNC 0x7C639301
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struct tmio_fb_data {
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int (*lcd_set_power)(struct platform_device *fb_dev,
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bool on);
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int (*lcd_mode)(struct platform_device *fb_dev,
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const struct fb_videomode *mode);
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int num_modes;
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struct fb_videomode *modes;
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/* in mm: size of screen */
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int height;
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int width;
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};
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#endif
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