6ab3d5624e
Signed-off-by: Jörn Engel <joern@wohnheim.fh-wedel.de> Signed-off-by: Adrian Bunk <bunk@stusta.de>
297 lines
4.9 KiB
ArmAsm
297 lines
4.9 KiB
ArmAsm
/*
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* linux/arch/m32r/lib/ashxdi3.S
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*
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* Copyright (C) 2001,2002 Hiroyuki Kondo, and Hirokazu Takata
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*
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*/
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/* $Id$ */
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;
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; input (r0,r1) src
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; input r2 shift val
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; r3 scratch
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; output (r0,r1)
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;
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#ifdef CONFIG_ISA_DUAL_ISSUE
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#ifndef __LITTLE_ENDIAN__
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.text
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.align 4
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.globl __ashrdi3
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__ashrdi3:
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cmpz r2 || ldi r3, #32
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jc r14 || cmpu r2, r3
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bc 1f
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; case 32 =< shift
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mv r1, r0 || srai r0, #31
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addi r2, #-32
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sra r1, r2
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jmp r14
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.fillinsn
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1: ; case shift <32
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mv r3, r0 || srl r1, r2
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sra r0, r2 || neg r2, r2
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sll r3, r2
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or r1, r3 || jmp r14
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.align 4
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.globl __ashldi3
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.globl __lshldi3
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__ashldi3:
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__lshldi3:
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cmpz r2 || ldi r3, #32
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jc r14 || cmpu r2, r3
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bc 1f
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; case 32 =< shift
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mv r0, r1 || addi r2, #-32
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sll r0, r2 || ldi r1, #0
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jmp r14
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.fillinsn
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1: ; case shift <32
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mv r3, r1 || sll r0, r2
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sll r1, r2 || neg r2, r2
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srl r3, r2
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or r0, r3 || jmp r14
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.align 4
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.globl __lshrdi3
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__lshrdi3:
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cmpz r2 || ldi r3, #32
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jc r14 || cmpu r2, r3
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bc 1f
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; case 32 =< shift
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mv r1, r0 || addi r2, #-32
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ldi r0, #0 || srl r1, r2
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jmp r14
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.fillinsn
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1: ; case shift <32
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mv r3, r0 || srl r1, r2
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srl r0, r2 || neg r2, r2
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sll r3, r2
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or r1, r3 || jmp r14
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#else /* LITTLE_ENDIAN */
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.text
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.align 4
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.globl __ashrdi3
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__ashrdi3:
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cmpz r2 || ldi r3, #32
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jc r14 || cmpu r2, r3
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bc 1f
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; case 32 =< shift
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mv r0, r1 || srai r1, #31
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addi r2, #-32
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sra r0, r2
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jmp r14
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.fillinsn
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1: ; case shift <32
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mv r3, r1 || srl r0, r2
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sra r1, r2 || neg r2, r2
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sll r3, r2
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or r0, r3 || jmp r14
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.align 4
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.globl __ashldi3
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.globl __lshldi3
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__ashldi3:
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__lshldi3:
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cmpz r2 || ldi r3, #32
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jc r14 || cmpu r2, r3
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bc 1f
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; case 32 =< shift
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mv r1, r0 || addi r2, #-32
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sll r1, r2 || ldi r0, #0
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jmp r14
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.fillinsn
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1: ; case shift <32
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mv r3, r0 || sll r1, r2
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sll r0, r2 || neg r2, r2
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srl r3, r2
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or r1, r3 || jmp r14
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.align 4
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.globl __lshrdi3
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__lshrdi3:
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cmpz r2 || ldi r3, #32
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jc r14 || cmpu r2, r3
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bc 1f
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; case 32 =< shift
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mv r0, r1 || addi r2, #-32
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ldi r1, #0 || srl r0, r2
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jmp r14
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.fillinsn
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1: ; case shift <32
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mv r3, r1 || srl r0, r2
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srl r1, r2 || neg r2, r2
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sll r3, r2
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or r0, r3 || jmp r14
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#endif
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#else /* not CONFIG_ISA_DUAL_ISSUE */
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#ifndef __LITTLE_ENDIAN__
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.text
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.align 4
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.globl __ashrdi3
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__ashrdi3:
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beqz r2, 2f
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cmpui r2, #32
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bc 1f
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; case 32 =< shift
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mv r1, r0
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srai r0, #31
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addi r2, #-32
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sra r1, r2
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jmp r14
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.fillinsn
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1: ; case shift <32
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mv r3, r0
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srl r1, r2
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sra r0, r2
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neg r2, r2
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sll r3, r2
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or r1, r3
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.fillinsn
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2:
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jmp r14
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.align 4
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.globl __ashldi3
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.globl __lshldi3
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__ashldi3:
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__lshldi3:
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beqz r2, 2f
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cmpui r2, #32
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bc 1f
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; case 32 =< shift
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mv r0, r1
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addi r2, #-32
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sll r0, r2
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ldi r1, #0
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jmp r14
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.fillinsn
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1: ; case shift <32
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mv r3, r1
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sll r0, r2
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sll r1, r2
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neg r2, r2
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srl r3, r2
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or r0, r3
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.fillinsn
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2:
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jmp r14
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.align 4
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.globl __lshrdi3
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__lshrdi3:
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beqz r2, 2f
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cmpui r2, #32
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bc 1f
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; case 32 =< shift
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mv r1, r0
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ldi r0, #0
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addi r2, #-32
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srl r1, r2
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jmp r14
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.fillinsn
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1: ; case shift <32
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mv r3, r0
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srl r1, r2
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srl r0, r2
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neg r2, r2
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sll r3, r2
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or r1, r3
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.fillinsn
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2:
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jmp r14
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#else
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.text
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.align 4
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.globl __ashrdi3
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__ashrdi3:
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beqz r2, 2f
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cmpui r2, #32
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bc 1f
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; case 32 =< shift
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mv r0, r1
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srai r1, #31
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addi r2, #-32
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sra r0, r2
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jmp r14
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.fillinsn
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1: ; case shift <32
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mv r3, r1
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srl r0, r2
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sra r1, r2
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neg r2, r2
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sll r3, r2
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or r0, r3
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.fillinsn
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2:
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jmp r14
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.align 4
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.globl __ashldi3
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.globl __lshldi3
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__ashldi3:
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__lshldi3:
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beqz r2, 2f
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cmpui r2, #32
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bc 1f
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; case 32 =< shift
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mv r1, r0
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addi r2, #-32
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sll r1, r2
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ldi r0, #0
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jmp r14
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.fillinsn
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1: ; case shift <32
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mv r3, r0
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sll r1, r2
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sll r0, r2
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neg r2, r2
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srl r3, r2
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or r1, r3
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.fillinsn
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2:
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jmp r14
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.align 4
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.globl __lshrdi3
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__lshrdi3:
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beqz r2, 2f
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cmpui r2, #32
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bc 1f
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; case 32 =< shift
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mv r0, r1
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ldi r1, #0
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addi r2, #-32
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srl r0, r2
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jmp r14
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.fillinsn
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1: ; case shift <32
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mv r3, r1
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srl r0, r2
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srl r1, r2
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neg r2, r2
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sll r3, r2
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or r0, r3
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.fillinsn
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2:
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jmp r14
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#endif
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#endif /* not CONFIG_ISA_DUAL_ISSUE */
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.end
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