5642530651
The trick is that we do the kernel linear mapping TLB miss starting with an instruction sequence like this: ba,pt %xcc, kvmap_load xor %g2, %g4, %g5 succeeded by an instruction sequence which performs a full page table walk starting at swapper_pg_dir. We first take over the trap table from the firmware. Then, using this constant PTE generation for the linear mapping area above, we build the kernel page tables for the linear mapping. After this is setup, we patch that branch above into a "nop", which will cause TLB misses to fall through to the full page table walk. With this, the page unmapping for CONFIG_DEBUG_PAGEALLOC is trivial. Signed-off-by: David S. Miller <davem@davemloft.net>
109 lines
2.3 KiB
ArmAsm
109 lines
2.3 KiB
ArmAsm
/* ld script to make UltraLinux kernel */
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#include <asm-generic/vmlinux.lds.h>
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OUTPUT_FORMAT("elf64-sparc", "elf64-sparc", "elf64-sparc")
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OUTPUT_ARCH(sparc:v9a)
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ENTRY(_start)
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jiffies = jiffies_64;
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SECTIONS
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{
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swapper_low_pmd_dir = 0x0000000000402000;
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. = 0x4000;
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.text 0x0000000000404000 :
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{
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*(.text)
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SCHED_TEXT
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LOCK_TEXT
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KPROBES_TEXT
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*(.gnu.warning)
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} =0
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_etext = .;
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PROVIDE (etext = .);
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RODATA
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.data :
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{
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*(.data)
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CONSTRUCTORS
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}
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.data1 : { *(.data1) }
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. = ALIGN(64);
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.data.cacheline_aligned : { *(.data.cacheline_aligned) }
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. = ALIGN(64);
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.data.read_mostly : { *(.data.read_mostly) }
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_edata = .;
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PROVIDE (edata = .);
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.fixup : { *(.fixup) }
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. = ALIGN(16);
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__start___ex_table = .;
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__ex_table : { *(__ex_table) }
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__stop___ex_table = .;
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. = ALIGN(8192);
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__init_begin = .;
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.init.text : {
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_sinittext = .;
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*(.init.text)
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_einittext = .;
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}
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.init.data : { *(.init.data) }
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. = ALIGN(16);
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__setup_start = .;
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.init.setup : { *(.init.setup) }
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__setup_end = .;
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__initcall_start = .;
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.initcall.init : {
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*(.initcall1.init)
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*(.initcall2.init)
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*(.initcall3.init)
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*(.initcall4.init)
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*(.initcall5.init)
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*(.initcall6.init)
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*(.initcall7.init)
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}
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__initcall_end = .;
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__con_initcall_start = .;
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.con_initcall.init : { *(.con_initcall.init) }
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__con_initcall_end = .;
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SECURITY_INIT
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. = ALIGN(8192);
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__initramfs_start = .;
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.init.ramfs : { *(.init.ramfs) }
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__initramfs_end = .;
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. = ALIGN(8192);
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__per_cpu_start = .;
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.data.percpu : { *(.data.percpu) }
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__per_cpu_end = .;
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. = ALIGN(8192);
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__init_end = .;
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__bss_start = .;
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.sbss : { *(.sbss) *(.scommon) }
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.bss :
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{
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*(.dynbss)
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*(.bss)
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*(COMMON)
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}
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_end = . ;
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PROVIDE (end = .);
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/* Stabs debugging sections. */
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.stab 0 : { *(.stab) }
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.stabstr 0 : { *(.stabstr) }
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.stab.excl 0 : { *(.stab.excl) }
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.stab.exclstr 0 : { *(.stab.exclstr) }
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.stab.index 0 : { *(.stab.index) }
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.stab.indexstr 0 : { *(.stab.indexstr) }
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.comment 0 : { *(.comment) }
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.debug 0 : { *(.debug) }
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.debug_srcinfo 0 : { *(.debug_srcinfo) }
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.debug_aranges 0 : { *(.debug_aranges) }
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.debug_pubnames 0 : { *(.debug_pubnames) }
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.debug_sfnames 0 : { *(.debug_sfnames) }
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.line 0 : { *(.line) }
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/DISCARD/ : { *(.exit.text) *(.exit.data) *(.exitcall.exit) }
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}
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