fce0d57403
This patch implements the kexec support for ppc64 platforms.
A couple of notes:
1) We copy the pages in virtual mode, using the full base kernel
and a statically allocated stack. At kexec_prepare time we
scan the pages and if any overlap our (0, _end[]) range we
return -ETXTBSY.
On PowerPC 64 systems running in LPAR (logical partitioning)
mode, only a small region of memory, referred to as the RMO,
can be accessed in real mode. Since Linux runs with only one
zone of memory in the memory allocator, and it can be orders of
magnitude more memory than the RMO, looping until we allocate
pages in the source region is not feasible. Copying in virtual
means we don't have to write a hash table generation and call
hypervisor to insert translations, instead we rely on the pinned
kernel linear mapping. The kernel already has move to linked
location built in, so there is no requirement to load it at 0.
If we want to load something other than a kernel, then a stub
can be written to copy a linear chunk in real mode.
2) The start entry point gets passed parameters from the kernel.
Slaves are started at a fixed address after copying code from
the entry point.
All CPUs get passed their firmware assigned physical id in r3
(most calling conventions use this register for the first
argument).
This is used to distinguish each CPU from all other CPUs.
Since firmware is not around, there is no other way to obtain
this information other than to pass it somewhere.
A single CPU, referred to here as the master and the one executing
the kexec call, branches to start with the address of start in r4.
While this can be calculated, we have to load it through a gpr to
branch to this point so defining the register this is contained
in is free. A stack of unspecified size is available at r1
(also common calling convention).
All remaining running CPUs are sent to start at absolute address
0x60 after copying the first 0x100 bytes from start to address 0.
This convention was chosen because it matches what the kernel
has been doing itself. (only gpr3 is defined).
Note: This is not quite the convention of the kexec bootblock v2
in the kernel. A stub has been written to convert between them,
and we may adjust the kernel in the future to allow this directly
without any stub.
3) Destination pages can be placed anywhere, even where they
would not be accessible in real mode. This will allow us to
place ram disks above the RMO if we choose.
Signed-off-by: Milton Miller <miltonm@bga.com>
Signed-off-by: R Sharada <sharada@in.ibm.com>
Signed-off-by: Paul Mackerras <paulus@samba.org>
Signed-off-by: Andrew Morton <akpm@osdl.org>
Signed-off-by: Linus Torvalds <torvalds@osdl.org>
443 lines
11 KiB
C
443 lines
11 KiB
C
/*
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* linux/arch/ppc/kernel/setup.c
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*
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* Copyright (C) 1995 Linus Torvalds
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* Adapted from 'alpha' version by Gary Thomas
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* Modified by Cort Dougan (cort@cs.nmt.edu)
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* Modified by PPC64 Team, IBM Corp
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*
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* This program is free software; you can redistribute it and/or
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* modify it under the terms of the GNU General Public License
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* as published by the Free Software Foundation; either version
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* 2 of the License, or (at your option) any later version.
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*/
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/*
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* bootup setup stuff..
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*/
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#undef DEBUG
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#include <linux/config.h>
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#include <linux/errno.h>
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#include <linux/sched.h>
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#include <linux/kernel.h>
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#include <linux/mm.h>
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#include <linux/stddef.h>
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#include <linux/unistd.h>
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#include <linux/slab.h>
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#include <linux/user.h>
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#include <linux/a.out.h>
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#include <linux/tty.h>
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#include <linux/major.h>
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#include <linux/interrupt.h>
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#include <linux/reboot.h>
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#include <linux/init.h>
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#include <linux/ioport.h>
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#include <linux/console.h>
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#include <linux/pci.h>
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#include <linux/version.h>
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#include <linux/adb.h>
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#include <linux/module.h>
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#include <linux/delay.h>
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#include <linux/irq.h>
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#include <linux/seq_file.h>
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#include <linux/root_dev.h>
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#include <asm/mmu.h>
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#include <asm/processor.h>
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#include <asm/io.h>
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#include <asm/pgtable.h>
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#include <asm/prom.h>
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#include <asm/rtas.h>
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#include <asm/pci-bridge.h>
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#include <asm/iommu.h>
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#include <asm/dma.h>
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#include <asm/machdep.h>
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#include <asm/irq.h>
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#include <asm/time.h>
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#include <asm/nvram.h>
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#include <asm/plpar_wrappers.h>
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#include <asm/xics.h>
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#include <asm/cputable.h>
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#include "i8259.h"
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#include "mpic.h"
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#include "pci.h"
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#ifdef DEBUG
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#define DBG(fmt...) udbg_printf(fmt)
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#else
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#define DBG(fmt...)
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#endif
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extern void find_udbg_vterm(void);
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extern void system_reset_fwnmi(void); /* from head.S */
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extern void machine_check_fwnmi(void); /* from head.S */
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extern void generic_find_legacy_serial_ports(u64 *physport,
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unsigned int *default_speed);
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int fwnmi_active; /* TRUE if an FWNMI handler is present */
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extern void pSeries_system_reset_exception(struct pt_regs *regs);
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extern int pSeries_machine_check_exception(struct pt_regs *regs);
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static volatile void __iomem * chrp_int_ack_special;
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struct mpic *pSeries_mpic;
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void pSeries_get_cpuinfo(struct seq_file *m)
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{
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struct device_node *root;
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const char *model = "";
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root = of_find_node_by_path("/");
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if (root)
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model = get_property(root, "model", NULL);
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seq_printf(m, "machine\t\t: CHRP %s\n", model);
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of_node_put(root);
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}
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/* Initialize firmware assisted non-maskable interrupts if
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* the firmware supports this feature.
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*
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*/
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static void __init fwnmi_init(void)
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{
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int ret;
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int ibm_nmi_register = rtas_token("ibm,nmi-register");
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if (ibm_nmi_register == RTAS_UNKNOWN_SERVICE)
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return;
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ret = rtas_call(ibm_nmi_register, 2, 1, NULL,
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__pa((unsigned long)system_reset_fwnmi),
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__pa((unsigned long)machine_check_fwnmi));
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if (ret == 0)
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fwnmi_active = 1;
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}
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static int pSeries_irq_cascade(struct pt_regs *regs, void *data)
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{
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if (chrp_int_ack_special)
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return readb(chrp_int_ack_special);
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else
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return i8259_irq(smp_processor_id());
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}
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static void __init pSeries_init_mpic(void)
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{
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unsigned int *addrp;
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struct device_node *np;
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int i;
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/* All ISUs are setup, complete initialization */
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mpic_init(pSeries_mpic);
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/* Check what kind of cascade ACK we have */
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if (!(np = of_find_node_by_name(NULL, "pci"))
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|| !(addrp = (unsigned int *)
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get_property(np, "8259-interrupt-acknowledge", NULL)))
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printk(KERN_ERR "Cannot find pci to get ack address\n");
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else
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chrp_int_ack_special = ioremap(addrp[prom_n_addr_cells(np)-1], 1);
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of_node_put(np);
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/* Setup the legacy interrupts & controller */
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for (i = 0; i < NUM_ISA_INTERRUPTS; i++)
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irq_desc[i].handler = &i8259_pic;
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i8259_init(0);
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/* Hook cascade to mpic */
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mpic_setup_cascade(NUM_ISA_INTERRUPTS, pSeries_irq_cascade, NULL);
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}
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static void __init pSeries_setup_mpic(void)
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{
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unsigned int *opprop;
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unsigned long openpic_addr = 0;
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unsigned char senses[NR_IRQS - NUM_ISA_INTERRUPTS];
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struct device_node *root;
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int irq_count;
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/* Find the Open PIC if present */
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root = of_find_node_by_path("/");
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opprop = (unsigned int *) get_property(root, "platform-open-pic", NULL);
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if (opprop != 0) {
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int n = prom_n_addr_cells(root);
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for (openpic_addr = 0; n > 0; --n)
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openpic_addr = (openpic_addr << 32) + *opprop++;
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printk(KERN_DEBUG "OpenPIC addr: %lx\n", openpic_addr);
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}
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of_node_put(root);
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BUG_ON(openpic_addr == 0);
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/* Get the sense values from OF */
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prom_get_irq_senses(senses, NUM_ISA_INTERRUPTS, NR_IRQS);
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/* Setup the openpic driver */
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irq_count = NR_IRQS - NUM_ISA_INTERRUPTS - 4; /* leave room for IPIs */
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pSeries_mpic = mpic_alloc(openpic_addr, MPIC_PRIMARY,
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16, 16, irq_count, /* isu size, irq offset, irq count */
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NR_IRQS - 4, /* ipi offset */
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senses, irq_count, /* sense & sense size */
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" MPIC ");
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}
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static void __init pSeries_setup_arch(void)
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{
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/* Fixup ppc_md depending on the type of interrupt controller */
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if (ppc64_interrupt_controller == IC_OPEN_PIC) {
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ppc_md.init_IRQ = pSeries_init_mpic;
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ppc_md.get_irq = mpic_get_irq;
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ppc_md.cpu_irq_down = mpic_teardown_this_cpu;
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/* Allocate the mpic now, so that find_and_init_phbs() can
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* fill the ISUs */
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pSeries_setup_mpic();
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} else {
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ppc_md.init_IRQ = xics_init_IRQ;
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ppc_md.get_irq = xics_get_irq;
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ppc_md.cpu_irq_down = xics_teardown_cpu;
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}
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#ifdef CONFIG_SMP
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smp_init_pSeries();
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#endif
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/* openpic global configuration register (64-bit format). */
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/* openpic Interrupt Source Unit pointer (64-bit format). */
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/* python0 facility area (mmio) (64-bit format) REAL address. */
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/* init to some ~sane value until calibrate_delay() runs */
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loops_per_jiffy = 50000000;
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if (ROOT_DEV == 0) {
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printk("No ramdisk, default root is /dev/sda2\n");
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ROOT_DEV = Root_SDA2;
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}
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fwnmi_init();
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/* Find and initialize PCI host bridges */
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init_pci_config_tokens();
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eeh_init();
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find_and_init_phbs();
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#ifdef CONFIG_DUMMY_CONSOLE
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conswitchp = &dummy_con;
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#endif
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pSeries_nvram_init();
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if (cur_cpu_spec->firmware_features & FW_FEATURE_SPLPAR)
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vpa_init(boot_cpuid);
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}
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static int __init pSeries_init_panel(void)
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{
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/* Manually leave the kernel version on the panel. */
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ppc_md.progress("Linux ppc64\n", 0);
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ppc_md.progress(UTS_RELEASE, 0);
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return 0;
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}
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arch_initcall(pSeries_init_panel);
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/* Build up the firmware_features bitmask field
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* using contents of device-tree/ibm,hypertas-functions.
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* Ultimately this functionality may be moved into prom.c prom_init().
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*/
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void __init fw_feature_init(void)
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{
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struct device_node * dn;
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char * hypertas;
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unsigned int len;
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DBG(" -> fw_feature_init()\n");
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cur_cpu_spec->firmware_features = 0;
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dn = of_find_node_by_path("/rtas");
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if (dn == NULL) {
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printk(KERN_ERR "WARNING ! Cannot find RTAS in device-tree !\n");
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goto no_rtas;
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}
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hypertas = get_property(dn, "ibm,hypertas-functions", &len);
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if (hypertas) {
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while (len > 0){
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int i, hypertas_len;
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/* check value against table of strings */
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for(i=0; i < FIRMWARE_MAX_FEATURES ;i++) {
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if ((firmware_features_table[i].name) &&
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(strcmp(firmware_features_table[i].name,hypertas))==0) {
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/* we have a match */
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cur_cpu_spec->firmware_features |=
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(firmware_features_table[i].val);
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break;
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}
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}
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hypertas_len = strlen(hypertas);
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len -= hypertas_len +1;
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hypertas+= hypertas_len +1;
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}
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}
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of_node_put(dn);
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no_rtas:
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printk(KERN_INFO "firmware_features = 0x%lx\n",
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cur_cpu_spec->firmware_features);
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DBG(" <- fw_feature_init()\n");
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}
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static void __init pSeries_discover_pic(void)
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{
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struct device_node *np;
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char *typep;
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/*
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* Setup interrupt mapping options that are needed for finish_device_tree
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* to properly parse the OF interrupt tree & do the virtual irq mapping
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*/
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__irq_offset_value = NUM_ISA_INTERRUPTS;
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ppc64_interrupt_controller = IC_INVALID;
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for (np = NULL; (np = of_find_node_by_name(np, "interrupt-controller"));) {
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typep = (char *)get_property(np, "compatible", NULL);
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if (strstr(typep, "open-pic"))
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ppc64_interrupt_controller = IC_OPEN_PIC;
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else if (strstr(typep, "ppc-xicp"))
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ppc64_interrupt_controller = IC_PPC_XIC;
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else
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printk("pSeries_discover_pic: failed to recognize"
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" interrupt-controller\n");
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break;
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}
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}
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static void pSeries_mach_cpu_die(void)
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{
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local_irq_disable();
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idle_task_exit();
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/* Some hardware requires clearing the CPPR, while other hardware does not
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* it is safe either way
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*/
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pSeriesLP_cppr_info(0, 0);
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rtas_stop_self();
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/* Should never get here... */
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BUG();
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for(;;);
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}
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/*
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* Early initialization. Relocation is on but do not reference unbolted pages
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*/
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static void __init pSeries_init_early(void)
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{
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void *comport;
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int iommu_off = 0;
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unsigned int default_speed;
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u64 physport;
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DBG(" -> pSeries_init_early()\n");
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fw_feature_init();
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if (systemcfg->platform & PLATFORM_LPAR)
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hpte_init_lpar();
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else {
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hpte_init_native();
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iommu_off = (of_chosen &&
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get_property(of_chosen, "linux,iommu-off", NULL));
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}
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generic_find_legacy_serial_ports(&physport, &default_speed);
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if (systemcfg->platform & PLATFORM_LPAR)
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find_udbg_vterm();
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else if (physport) {
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/* Map the uart for udbg. */
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comport = (void *)ioremap(physport, 16);
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udbg_init_uart(comport, default_speed);
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ppc_md.udbg_putc = udbg_putc;
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ppc_md.udbg_getc = udbg_getc;
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ppc_md.udbg_getc_poll = udbg_getc_poll;
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DBG("Hello World !\n");
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}
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iommu_init_early_pSeries();
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pSeries_discover_pic();
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DBG(" <- pSeries_init_early()\n");
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}
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static int pSeries_check_legacy_ioport(unsigned int baseport)
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{
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struct device_node *np;
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#define I8042_DATA_REG 0x60
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#define FDC_BASE 0x3f0
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switch(baseport) {
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case I8042_DATA_REG:
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np = of_find_node_by_type(NULL, "8042");
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if (np == NULL)
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return -ENODEV;
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of_node_put(np);
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break;
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case FDC_BASE:
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np = of_find_node_by_type(NULL, "fdc");
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if (np == NULL)
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return -ENODEV;
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of_node_put(np);
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break;
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}
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return 0;
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}
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/*
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* Called very early, MMU is off, device-tree isn't unflattened
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*/
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extern struct machdep_calls pSeries_md;
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static int __init pSeries_probe(int platform)
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{
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if (platform != PLATFORM_PSERIES &&
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platform != PLATFORM_PSERIES_LPAR)
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return 0;
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/* if we have some ppc_md fixups for LPAR to do, do
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* it here ...
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*/
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return 1;
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}
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struct machdep_calls __initdata pSeries_md = {
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.probe = pSeries_probe,
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.setup_arch = pSeries_setup_arch,
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.init_early = pSeries_init_early,
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.get_cpuinfo = pSeries_get_cpuinfo,
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.log_error = pSeries_log_error,
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.pcibios_fixup = pSeries_final_fixup,
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.irq_bus_setup = pSeries_irq_bus_setup,
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.restart = rtas_restart,
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.power_off = rtas_power_off,
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.halt = rtas_halt,
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.panic = rtas_os_term,
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.cpu_die = pSeries_mach_cpu_die,
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.get_boot_time = rtas_get_boot_time,
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.get_rtc_time = rtas_get_rtc_time,
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.set_rtc_time = rtas_set_rtc_time,
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.calibrate_decr = generic_calibrate_decr,
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.progress = rtas_progress,
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.check_legacy_ioport = pSeries_check_legacy_ioport,
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.system_reset_exception = pSeries_system_reset_exception,
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.machine_check_exception = pSeries_machine_check_exception,
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};
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