1c0c13eb93
Note that the BCM4710 does not support the wait instruction, this
is not a mistake in the code.
It originally comes from the OpenWrt patches.
Cc: Michael Buesch <mb@bu3sch.de>
Cc: Felix Fietkau <nbd@openwrt.org>
Cc: Florian Schirmer <jolt@tuxbox.org>
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
Signed-off-by: Andrew Morton <akpm@linux-foundation.org>
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
169 lines
4.5 KiB
C
169 lines
4.5 KiB
C
/*
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* linux/arch/mips/kernel/proc.c
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*
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* Copyright (C) 1995, 1996, 2001 Ralf Baechle
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* Copyright (C) 2001, 2004 MIPS Technologies, Inc.
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* Copyright (C) 2004 Maciej W. Rozycki
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*/
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#include <linux/delay.h>
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#include <linux/kernel.h>
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#include <linux/sched.h>
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#include <linux/seq_file.h>
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#include <asm/bootinfo.h>
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#include <asm/cpu.h>
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#include <asm/cpu-features.h>
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#include <asm/mipsregs.h>
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#include <asm/processor.h>
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unsigned int vced_count, vcei_count;
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static const char *cpu_name[] = {
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[CPU_UNKNOWN] = "unknown",
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[CPU_R2000] = "R2000",
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[CPU_R3000] = "R3000",
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[CPU_R3000A] = "R3000A",
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[CPU_R3041] = "R3041",
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[CPU_R3051] = "R3051",
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[CPU_R3052] = "R3052",
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[CPU_R3081] = "R3081",
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[CPU_R3081E] = "R3081E",
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[CPU_R4000PC] = "R4000PC",
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[CPU_R4000SC] = "R4000SC",
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[CPU_R4000MC] = "R4000MC",
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[CPU_R4200] = "R4200",
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[CPU_R4400PC] = "R4400PC",
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[CPU_R4400SC] = "R4400SC",
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[CPU_R4400MC] = "R4400MC",
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[CPU_R4600] = "R4600",
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[CPU_R6000] = "R6000",
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[CPU_R6000A] = "R6000A",
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[CPU_R8000] = "R8000",
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[CPU_R10000] = "R10000",
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[CPU_R12000] = "R12000",
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[CPU_R14000] = "R14000",
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[CPU_R4300] = "R4300",
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[CPU_R4650] = "R4650",
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[CPU_R4700] = "R4700",
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[CPU_R5000] = "R5000",
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[CPU_R5000A] = "R5000A",
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[CPU_R4640] = "R4640",
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[CPU_NEVADA] = "Nevada",
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[CPU_RM7000] = "RM7000",
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[CPU_RM9000] = "RM9000",
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[CPU_R5432] = "R5432",
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[CPU_4KC] = "MIPS 4Kc",
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[CPU_5KC] = "MIPS 5Kc",
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[CPU_R4310] = "R4310",
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[CPU_SB1] = "SiByte SB1",
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[CPU_SB1A] = "SiByte SB1A",
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[CPU_TX3912] = "TX3912",
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[CPU_TX3922] = "TX3922",
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[CPU_TX3927] = "TX3927",
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[CPU_AU1000] = "Au1000",
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[CPU_AU1500] = "Au1500",
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[CPU_AU1100] = "Au1100",
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[CPU_AU1550] = "Au1550",
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[CPU_AU1200] = "Au1200",
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[CPU_4KEC] = "MIPS 4KEc",
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[CPU_4KSC] = "MIPS 4KSc",
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[CPU_VR41XX] = "NEC Vr41xx",
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[CPU_R5500] = "R5500",
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[CPU_TX49XX] = "TX49xx",
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[CPU_20KC] = "MIPS 20Kc",
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[CPU_24K] = "MIPS 24K",
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[CPU_25KF] = "MIPS 25Kf",
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[CPU_34K] = "MIPS 34K",
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[CPU_74K] = "MIPS 74K",
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[CPU_VR4111] = "NEC VR4111",
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[CPU_VR4121] = "NEC VR4121",
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[CPU_VR4122] = "NEC VR4122",
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[CPU_VR4131] = "NEC VR4131",
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[CPU_VR4133] = "NEC VR4133",
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[CPU_VR4181] = "NEC VR4181",
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[CPU_VR4181A] = "NEC VR4181A",
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[CPU_SR71000] = "Sandcraft SR71000",
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[CPU_BCM3302] = "Broadcom BCM3302",
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[CPU_BCM4710] = "Broadcom BCM4710",
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[CPU_PR4450] = "Philips PR4450",
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[CPU_LOONGSON2] = "ICT Loongson-2",
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};
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static int show_cpuinfo(struct seq_file *m, void *v)
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{
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unsigned long n = (unsigned long) v - 1;
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unsigned int version = cpu_data[n].processor_id;
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unsigned int fp_vers = cpu_data[n].fpu_id;
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char fmt [64];
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#ifdef CONFIG_SMP
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if (!cpu_isset(n, cpu_online_map))
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return 0;
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#endif
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/*
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* For the first processor also print the system type
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*/
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if (n == 0)
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seq_printf(m, "system type\t\t: %s\n", get_system_type());
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seq_printf(m, "processor\t\t: %ld\n", n);
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sprintf(fmt, "cpu model\t\t: %%s V%%d.%%d%s\n",
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cpu_data[n].options & MIPS_CPU_FPU ? " FPU V%d.%d" : "");
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seq_printf(m, fmt, cpu_name[cpu_data[n].cputype <= CPU_LAST ?
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cpu_data[n].cputype : CPU_UNKNOWN],
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(version >> 4) & 0x0f, version & 0x0f,
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(fp_vers >> 4) & 0x0f, fp_vers & 0x0f);
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seq_printf(m, "BogoMIPS\t\t: %lu.%02lu\n",
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cpu_data[n].udelay_val / (500000/HZ),
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(cpu_data[n].udelay_val / (5000/HZ)) % 100);
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seq_printf(m, "wait instruction\t: %s\n", cpu_wait ? "yes" : "no");
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seq_printf(m, "microsecond timers\t: %s\n",
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cpu_has_counter ? "yes" : "no");
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seq_printf(m, "tlb_entries\t\t: %d\n", cpu_data[n].tlbsize);
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seq_printf(m, "extra interrupt vector\t: %s\n",
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cpu_has_divec ? "yes" : "no");
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seq_printf(m, "hardware watchpoint\t: %s\n",
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cpu_has_watch ? "yes" : "no");
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seq_printf(m, "ASEs implemented\t:%s%s%s%s%s%s\n",
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cpu_has_mips16 ? " mips16" : "",
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cpu_has_mdmx ? " mdmx" : "",
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cpu_has_mips3d ? " mips3d" : "",
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cpu_has_smartmips ? " smartmips" : "",
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cpu_has_dsp ? " dsp" : "",
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cpu_has_mipsmt ? " mt" : ""
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);
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sprintf(fmt, "VCE%%c exceptions\t\t: %s\n",
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cpu_has_vce ? "%u" : "not available");
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seq_printf(m, fmt, 'D', vced_count);
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seq_printf(m, fmt, 'I', vcei_count);
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seq_printf(m, "\n");
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return 0;
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}
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static void *c_start(struct seq_file *m, loff_t *pos)
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{
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unsigned long i = *pos;
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return i < NR_CPUS ? (void *) (i + 1) : NULL;
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}
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static void *c_next(struct seq_file *m, void *v, loff_t *pos)
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{
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++*pos;
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return c_start(m, pos);
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}
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static void c_stop(struct seq_file *m, void *v)
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{
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}
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struct seq_operations cpuinfo_op = {
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.start = c_start,
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.next = c_next,
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.stop = c_stop,
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.show = show_cpuinfo,
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};
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