Benjamin Herrenschmidt 20474abda6 [POWERPC] Fix cache line vs. block size confusion ... We had an historical confusion in the kernel between cache line and cache block size. The former is an implementation detail of the L1 cache which can be useful for performance optimisations, the later is the actual size on which the cache control instructions operate, which can be different. For some reason, we had a weird hack reading the right property on powermac and the wrong one on any other 64 bits (32 bits is unaffected as it only uses the cputable for cache block size infos at this stage). This fixes the booting-without-of.txt documentation to mention the right properties, and fixes the 64 bits initialization code to look for the block size first, with a fallback to the line size if the property is missing. Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org> Signed-off-by: Paul Mackerras <paulus@samba.org>		2007-11-08 14:15:30 +11:00
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00-INDEX	Add entries to Documentation/powerpc	2007-10-17 08:43:06 -07:00
booting-without-of.txt	[POWERPC] Fix cache line vs. block size confusion	2007-11-08 14:15:30 +11:00
cpu_features.txt
eeh-pci-error-recovery.txt	typo fixes	2007-10-20 01:34:40 +02:00
hvcs.txt
mpc52xx-device-tree-bindings.txt	[POWERPC] Update device tree binding for mpc5200 gpt	2007-10-21 12:42:55 -06:00
mpc52xx.txt
ppc_htab.txt
SBC8260_memory_mapping.txt
smp.txt
sound.txt
zImage_layout.txt