Atsushi Nemoto 21e77df215 MIPS: TXx9: Microoptimize interrupt handlers ... The IOC interrupt status register on RBTX49XX only have 8 bits. Use 8-bit version of __fls() to optimize interrupt handlers. Signed-off-by: Atsushi Nemoto <anemo@mba.ocn.ne.jp> Signed-off-by: Ralf Baechle <ralf@linux-mips.org>		2008-10-11 16:18:47 +01:00
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irq.c	MIPS: TXx9: Microoptimize interrupt handlers	2008-10-11 16:18:47 +01:00
Makefile	MIPS: TXx9: Make spi_eeprom.c more generic	2008-10-11 16:18:44 +01:00
prom.c	MIPS: TXx9: Improve handling of built-in and command-line args	2008-10-11 16:18:41 +01:00
setup.c	MIPS: TXx9: Make spi_eeprom.c more generic	2008-10-11 16:18:44 +01:00