225c9a8d1d
This provides a workaround for users of sh_mobile_lcdcfb that don't define HAVE_CLK and have otherwise sane clock initialization. At the same time, move the sh_mobile_lcdc.h header to include/video/. Signed-off-by: Paul Mundt <lethal@linux-sh.org>
334 lines
8.1 KiB
C
334 lines
8.1 KiB
C
/*
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* Renesas - AP-325RXA
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* (Compatible with Algo System ., LTD. - AP-320A)
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*
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* Copyright (C) 2008 Renesas Solutions Corp.
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* Author : Yusuke Goda <goda.yuske@renesas.com>
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*
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* This file is subject to the terms and conditions of the GNU General Public
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* License. See the file "COPYING" in the main directory of this archive
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* for more details.
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*/
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#include <linux/init.h>
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#include <linux/device.h>
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#include <linux/interrupt.h>
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#include <linux/platform_device.h>
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#include <linux/mtd/physmap.h>
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#include <linux/delay.h>
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#include <linux/i2c.h>
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#include <linux/smc911x.h>
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#include <media/soc_camera_platform.h>
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#include <media/sh_mobile_ceu.h>
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#include <video/sh_mobile_lcdc.h>
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#include <asm/io.h>
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#include <asm/clock.h>
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static struct smc911x_platdata smc911x_info = {
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.flags = SMC911X_USE_32BIT,
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.irq_flags = IRQF_TRIGGER_LOW,
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};
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static struct resource smc9118_resources[] = {
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[0] = {
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.start = 0xb6080000,
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.end = 0xb60fffff,
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.flags = IORESOURCE_MEM,
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},
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[1] = {
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.start = 35,
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.end = 35,
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.flags = IORESOURCE_IRQ,
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}
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};
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static struct platform_device smc9118_device = {
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.name = "smc911x",
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.id = -1,
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.num_resources = ARRAY_SIZE(smc9118_resources),
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.resource = smc9118_resources,
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.dev = {
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.platform_data = &smc911x_info,
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},
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};
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/*
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* AP320 and AP325RXA has CPLD data in NOR Flash(0xA80000-0xABFFFF).
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* If this area erased, this board can not boot.
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*/
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static struct mtd_partition ap325rxa_nor_flash_partitions[] = {
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{
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.name = "uboot",
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.offset = 0,
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.size = (1 * 1024 * 1024),
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.mask_flags = MTD_WRITEABLE, /* Read-only */
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}, {
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.name = "kernel",
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.offset = MTDPART_OFS_APPEND,
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.size = (2 * 1024 * 1024),
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}, {
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.name = "free-area0",
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.offset = MTDPART_OFS_APPEND,
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.size = ((7 * 1024 * 1024) + (512 * 1024)),
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}, {
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.name = "CPLD-Data",
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.offset = MTDPART_OFS_APPEND,
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.mask_flags = MTD_WRITEABLE, /* Read-only */
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.size = (1024 * 128 * 2),
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}, {
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.name = "free-area1",
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.offset = MTDPART_OFS_APPEND,
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.size = MTDPART_SIZ_FULL,
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},
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};
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static struct physmap_flash_data ap325rxa_nor_flash_data = {
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.width = 2,
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.parts = ap325rxa_nor_flash_partitions,
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.nr_parts = ARRAY_SIZE(ap325rxa_nor_flash_partitions),
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};
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static struct resource ap325rxa_nor_flash_resources[] = {
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[0] = {
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.name = "NOR Flash",
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.start = 0x00000000,
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.end = 0x00ffffff,
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.flags = IORESOURCE_MEM,
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}
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};
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static struct platform_device ap325rxa_nor_flash_device = {
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.name = "physmap-flash",
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.resource = ap325rxa_nor_flash_resources,
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.num_resources = ARRAY_SIZE(ap325rxa_nor_flash_resources),
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.dev = {
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.platform_data = &ap325rxa_nor_flash_data,
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},
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};
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#define FPGA_LCDREG 0xB4100180
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#define FPGA_BKLREG 0xB4100212
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#define FPGA_LCDREG_VAL 0x0018
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#define PORT_PHCR 0xA405010E
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#define PORT_PLCR 0xA4050114
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#define PORT_PMCR 0xA4050116
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#define PORT_PRCR 0xA405011C
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#define PORT_PSCR 0xA405011E
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#define PORT_PZCR 0xA405014C
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#define PORT_HIZCRA 0xA4050158
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#define PORT_MSELCRB 0xA4050182
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#define PORT_PSDR 0xA405013E
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#define PORT_PZDR 0xA405016C
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#define PORT_PSELD 0xA4050154
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static void ap320_wvga_power_on(void *board_data)
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{
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msleep(100);
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/* ASD AP-320/325 LCD ON */
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ctrl_outw(FPGA_LCDREG_VAL, FPGA_LCDREG);
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/* backlight */
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ctrl_outw((ctrl_inw(PORT_PSCR) & ~0x00C0) | 0x40, PORT_PSCR);
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ctrl_outb(ctrl_inb(PORT_PSDR) & ~0x08, PORT_PSDR);
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ctrl_outw(0x100, FPGA_BKLREG);
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}
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static struct sh_mobile_lcdc_info lcdc_info = {
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.clock_source = LCDC_CLK_EXTERNAL,
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.ch[0] = {
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.chan = LCDC_CHAN_MAINLCD,
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.bpp = 16,
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.interface_type = RGB18,
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.clock_divider = 1,
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.lcd_cfg = {
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.name = "LB070WV1",
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.xres = 800,
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.yres = 480,
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.left_margin = 40,
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.right_margin = 160,
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.hsync_len = 8,
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.upper_margin = 63,
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.lower_margin = 80,
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.vsync_len = 1,
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.sync = 0, /* hsync and vsync are active low */
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},
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.lcd_size_cfg = { /* 7.0 inch */
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.width = 152,
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.height = 91,
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},
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.board_cfg = {
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.display_on = ap320_wvga_power_on,
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},
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}
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};
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static struct resource lcdc_resources[] = {
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[0] = {
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.name = "LCDC",
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.start = 0xfe940000, /* P4-only space */
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.end = 0xfe941fff,
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.flags = IORESOURCE_MEM,
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},
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};
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static struct platform_device lcdc_device = {
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.name = "sh_mobile_lcdc_fb",
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.num_resources = ARRAY_SIZE(lcdc_resources),
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.resource = lcdc_resources,
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.dev = {
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.platform_data = &lcdc_info,
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},
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};
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#ifdef CONFIG_I2C
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static unsigned char camera_ncm03j_magic[] =
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{
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0x87, 0x00, 0x88, 0x08, 0x89, 0x01, 0x8A, 0xE8,
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0x1D, 0x00, 0x1E, 0x8A, 0x21, 0x00, 0x33, 0x36,
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0x36, 0x60, 0x37, 0x08, 0x3B, 0x31, 0x44, 0x0F,
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0x46, 0xF0, 0x4B, 0x28, 0x4C, 0x21, 0x4D, 0x55,
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0x4E, 0x1B, 0x4F, 0xC7, 0x50, 0xFC, 0x51, 0x12,
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0x58, 0x02, 0x66, 0xC0, 0x67, 0x46, 0x6B, 0xA0,
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0x6C, 0x34, 0x7E, 0x25, 0x7F, 0x25, 0x8D, 0x0F,
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0x92, 0x40, 0x93, 0x04, 0x94, 0x26, 0x95, 0x0A,
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0x99, 0x03, 0x9A, 0xF0, 0x9B, 0x14, 0x9D, 0x7A,
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0xC5, 0x02, 0xD6, 0x07, 0x59, 0x00, 0x5A, 0x1A,
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0x5B, 0x2A, 0x5C, 0x37, 0x5D, 0x42, 0x5E, 0x56,
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0xC8, 0x00, 0xC9, 0x1A, 0xCA, 0x2A, 0xCB, 0x37,
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0xCC, 0x42, 0xCD, 0x56, 0xCE, 0x00, 0xCF, 0x1A,
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0xD0, 0x2A, 0xD1, 0x37, 0xD2, 0x42, 0xD3, 0x56,
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0x5F, 0x68, 0x60, 0x87, 0x61, 0xA3, 0x62, 0xBC,
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0x63, 0xD4, 0x64, 0xEA, 0xD6, 0x0F,
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};
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static int camera_set_capture(struct soc_camera_platform_info *info,
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int enable)
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{
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struct i2c_adapter *a = i2c_get_adapter(0);
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struct i2c_msg msg;
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int ret = 0;
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int i;
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if (!enable)
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return 0; /* no disable for now */
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for (i = 0; i < ARRAY_SIZE(camera_ncm03j_magic); i += 2) {
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u_int8_t buf[8];
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msg.addr = 0x6e;
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msg.buf = buf;
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msg.len = 2;
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msg.flags = 0;
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buf[0] = camera_ncm03j_magic[i];
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buf[1] = camera_ncm03j_magic[i + 1];
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ret = (ret < 0) ? ret : i2c_transfer(a, &msg, 1);
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}
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return ret;
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}
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static struct soc_camera_platform_info camera_info = {
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.iface = 0,
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.format_name = "UYVY",
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.format_depth = 16,
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.format = {
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.pixelformat = V4L2_PIX_FMT_UYVY,
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.colorspace = V4L2_COLORSPACE_SMPTE170M,
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.width = 640,
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.height = 480,
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},
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.bus_param = SOCAM_PCLK_SAMPLE_RISING | SOCAM_HSYNC_ACTIVE_HIGH |
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SOCAM_VSYNC_ACTIVE_HIGH | SOCAM_MASTER | SOCAM_DATAWIDTH_8,
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.set_capture = camera_set_capture,
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};
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static struct platform_device camera_device = {
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.name = "soc_camera_platform",
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.dev = {
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.platform_data = &camera_info,
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},
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};
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#endif /* CONFIG_I2C */
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static struct sh_mobile_ceu_info sh_mobile_ceu_info = {
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.flags = SOCAM_PCLK_SAMPLE_RISING | SOCAM_HSYNC_ACTIVE_HIGH |
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SOCAM_VSYNC_ACTIVE_HIGH | SOCAM_MASTER | SOCAM_DATAWIDTH_8,
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};
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static struct resource ceu_resources[] = {
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[0] = {
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.name = "CEU",
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.start = 0xfe910000,
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.end = 0xfe91009f,
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.flags = IORESOURCE_MEM,
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},
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[1] = {
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.start = 52,
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.flags = IORESOURCE_IRQ,
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},
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[2] = {
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/* place holder for contiguous memory */
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},
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};
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static struct platform_device ceu_device = {
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.name = "sh_mobile_ceu",
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.num_resources = ARRAY_SIZE(ceu_resources),
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.resource = ceu_resources,
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.dev = {
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.platform_data = &sh_mobile_ceu_info,
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},
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};
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static struct platform_device *ap325rxa_devices[] __initdata = {
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&smc9118_device,
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&ap325rxa_nor_flash_device,
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&lcdc_device,
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&ceu_device,
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#ifdef CONFIG_I2C
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&camera_device,
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#endif
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};
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static struct i2c_board_info __initdata ap325rxa_i2c_devices[] = {
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};
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static int __init ap325rxa_devices_setup(void)
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{
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clk_always_enable("mstp200"); /* LCDC */
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clk_always_enable("mstp203"); /* CEU */
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platform_resource_setup_memory(&ceu_device, "ceu", 4 << 20);
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i2c_register_board_info(0, ap325rxa_i2c_devices,
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ARRAY_SIZE(ap325rxa_i2c_devices));
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return platform_add_devices(ap325rxa_devices,
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ARRAY_SIZE(ap325rxa_devices));
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}
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device_initcall(ap325rxa_devices_setup);
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static void __init ap325rxa_setup(char **cmdline_p)
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{
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/* LCDC configuration */
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ctrl_outw(ctrl_inw(PORT_PHCR) & ~0xffff, PORT_PHCR);
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ctrl_outw(ctrl_inw(PORT_PLCR) & ~0xffff, PORT_PLCR);
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ctrl_outw(ctrl_inw(PORT_PMCR) & ~0xffff, PORT_PMCR);
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ctrl_outw(ctrl_inw(PORT_PRCR) & ~0x03ff, PORT_PRCR);
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ctrl_outw(ctrl_inw(PORT_HIZCRA) & ~0x01C0, PORT_HIZCRA);
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/* CEU */
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ctrl_outw(ctrl_inw(PORT_MSELCRB) & ~0x0001, PORT_MSELCRB);
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ctrl_outw(ctrl_inw(PORT_PSELD) & ~0x0003, PORT_PSELD);
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ctrl_outw((ctrl_inw(PORT_PZCR) & ~0xff00) | 0x5500, PORT_PZCR);
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ctrl_outb((ctrl_inb(PORT_PZDR) & ~0xf0) | 0x20, PORT_PZDR);
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}
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static struct sh_machine_vector mv_ap325rxa __initmv = {
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.mv_name = "AP-325RXA",
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.mv_setup = ap325rxa_setup,
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};
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