Simon Kagstrom 94da210af4 [ARM] Orion NAND: Make asm volatile avoid GCC pushing ldrd out of the loop ... GCC 4.3.3 and 4.4.1 happily moves the dword load instruction out of the loop in orion_nand_read_buf. This patch makes the instruction volatile to avoid the issue. I've discussed this at gcc-help, refer to the thread at http://gcc.gnu.org/ml/gcc-help/2009-08/msg00187.html The early clobber is added to avoid the destination registers and the source register overlapping. Signed-off-by: Simon Kagstrom <simon.kagstrom@netinsight.net> Signed-off-by: Nicolas Pitre <nico@marvell.com>		2009-08-24 11:56:00 -04:00
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alauda.c
ams-delta.c
atmel_nand_ecc.h
atmel_nand.c
au1550nd.c
autcpu12.c
bf5xx_nand.c
cafe_nand.c
cmx270_nand.c
cs553x_nand.c
davinci_nand.c
diskonchip.c
edb7312.c
excite_nandflash.c
fsl_elbc_nand.c
fsl_upm.c
gpio.c
h1910.c
Kconfig
Makefile
mxc_nand.c
nand_base.c
nand_bbt.c
nand_ecc.c
nand_ids.c
nandsim.c
ndfc.c
omap2.c
orion_nand.c	[ARM] Orion NAND: Make asm volatile avoid GCC pushing ldrd out of the loop	2009-08-24 11:56:00 -04:00
pasemi_nand.c
plat_nand.c
ppchameleonevb.c
pxa3xx_nand.c
rtc_from4.c
s3c2410.c
sh_flctl.c
sharpsl.c
socrates_nand.c
spia.c
tmio_nand.c
ts7250.c
txx9ndfmc.c