701 lines
18 KiB
C
701 lines
18 KiB
C
/*
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* (C) 2001-2004 Dave Jones. <davej@codemonkey.org.uk>
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* (C) 2002 Padraig Brady. <padraig@antefacto.com>
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*
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* Licensed under the terms of the GNU GPL License version 2.
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* Based upon datasheets & sample CPUs kindly provided by VIA.
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*
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* VIA have currently 3 different versions of Longhaul.
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* Version 1 (Longhaul) uses the BCR2 MSR at 0x1147.
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* It is present only in Samuel 1 (C5A), Samuel 2 (C5B) stepping 0.
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* Version 2 of longhaul is the same as v1, but adds voltage scaling.
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* Present in Samuel 2 (steppings 1-7 only) (C5B), and Ezra (C5C)
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* voltage scaling support has currently been disabled in this driver
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* until we have code that gets it right.
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* Version 3 of longhaul got renamed to Powersaver and redesigned
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* to use the POWERSAVER MSR at 0x110a.
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* It is present in Ezra-T (C5M), Nehemiah (C5X) and above.
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* It's pretty much the same feature wise to longhaul v2, though
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* there is provision for scaling FSB too, but this doesn't work
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* too well in practice so we don't even try to use this.
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*
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* BIG FAT DISCLAIMER: Work in progress code. Possibly *dangerous*
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*/
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#include <linux/kernel.h>
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#include <linux/module.h>
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#include <linux/moduleparam.h>
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#include <linux/init.h>
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#include <linux/cpufreq.h>
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#include <linux/slab.h>
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#include <linux/string.h>
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#include <linux/pci.h>
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#include <asm/msr.h>
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#include <asm/timex.h>
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#include <asm/io.h>
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#include "longhaul.h"
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#define PFX "longhaul: "
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#define TYPE_LONGHAUL_V1 1
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#define TYPE_LONGHAUL_V2 2
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#define TYPE_POWERSAVER 3
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#define CPU_SAMUEL 1
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#define CPU_SAMUEL2 2
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#define CPU_EZRA 3
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#define CPU_EZRA_T 4
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#define CPU_NEHEMIAH 5
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static int cpu_model;
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static unsigned int numscales=16, numvscales;
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static unsigned int fsb;
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static int minvid, maxvid;
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static unsigned int minmult, maxmult;
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static int can_scale_voltage;
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static int vrmrev;
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/* Module parameters */
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static int dont_scale_voltage;
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#define dprintk(msg...) cpufreq_debug_printk(CPUFREQ_DEBUG_DRIVER, "longhaul", msg)
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/* Clock ratios multiplied by 10 */
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static int clock_ratio[32];
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static int eblcr_table[32];
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static int voltage_table[32];
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static unsigned int highest_speed, lowest_speed; /* kHz */
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static int longhaul_version;
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static struct cpufreq_frequency_table *longhaul_table;
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#ifdef CONFIG_CPU_FREQ_DEBUG
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static char speedbuffer[8];
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static char *print_speed(int speed)
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{
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if (speed > 1000) {
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if (speed%1000 == 0)
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sprintf (speedbuffer, "%dGHz", speed/1000);
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else
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sprintf (speedbuffer, "%d.%dGHz", speed/1000, (speed%1000)/100);
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} else
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sprintf (speedbuffer, "%dMHz", speed);
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return speedbuffer;
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}
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#endif
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static unsigned int calc_speed(int mult)
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{
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int khz;
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khz = (mult/10)*fsb;
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if (mult%10)
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khz += fsb/2;
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khz *= 1000;
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return khz;
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}
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static int longhaul_get_cpu_mult(void)
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{
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unsigned long invalue=0,lo, hi;
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rdmsr (MSR_IA32_EBL_CR_POWERON, lo, hi);
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invalue = (lo & (1<<22|1<<23|1<<24|1<<25)) >>22;
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if (longhaul_version==TYPE_LONGHAUL_V2 || longhaul_version==TYPE_POWERSAVER) {
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if (lo & (1<<27))
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invalue+=16;
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}
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return eblcr_table[invalue];
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}
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static void do_powersaver(union msr_longhaul *longhaul,
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unsigned int clock_ratio_index)
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{
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struct pci_dev *dev;
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unsigned long flags;
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unsigned int tmp_mask;
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int version;
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int i;
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u16 pci_cmd;
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u16 cmd_state[64];
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switch (cpu_model) {
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case CPU_EZRA_T:
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version = 3;
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break;
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case CPU_NEHEMIAH:
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version = 0xf;
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break;
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default:
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return;
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}
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rdmsrl(MSR_VIA_LONGHAUL, longhaul->val);
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longhaul->bits.SoftBusRatio = clock_ratio_index & 0xf;
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longhaul->bits.SoftBusRatio4 = (clock_ratio_index & 0x10) >> 4;
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longhaul->bits.EnableSoftBusRatio = 1;
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longhaul->bits.RevisionKey = 0;
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preempt_disable();
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local_irq_save(flags);
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/*
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* get current pci bus master state for all devices
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* and clear bus master bit
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*/
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dev = NULL;
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i = 0;
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do {
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dev = pci_get_device(PCI_ANY_ID, PCI_ANY_ID, dev);
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if (dev != NULL) {
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pci_read_config_word(dev, PCI_COMMAND, &pci_cmd);
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cmd_state[i++] = pci_cmd;
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pci_cmd &= ~PCI_COMMAND_MASTER;
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pci_write_config_word(dev, PCI_COMMAND, pci_cmd);
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}
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} while (dev != NULL);
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tmp_mask=inb(0x21); /* works on C3. save mask. */
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outb(0xFE,0x21); /* TMR0 only */
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outb(0xFF,0x80); /* delay */
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safe_halt();
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wrmsrl(MSR_VIA_LONGHAUL, longhaul->val);
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halt();
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local_irq_disable();
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outb(tmp_mask,0x21); /* restore mask */
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/* restore pci bus master state for all devices */
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dev = NULL;
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i = 0;
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do {
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dev = pci_get_device(PCI_ANY_ID, PCI_ANY_ID, dev);
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if (dev != NULL) {
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pci_cmd = cmd_state[i++];
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pci_write_config_byte(dev, PCI_COMMAND, pci_cmd);
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}
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} while (dev != NULL);
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local_irq_restore(flags);
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preempt_enable();
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/* disable bus ratio bit */
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rdmsrl(MSR_VIA_LONGHAUL, longhaul->val);
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longhaul->bits.EnableSoftBusRatio = 0;
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longhaul->bits.RevisionKey = version;
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wrmsrl(MSR_VIA_LONGHAUL, longhaul->val);
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}
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/**
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* longhaul_set_cpu_frequency()
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* @clock_ratio_index : bitpattern of the new multiplier.
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*
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* Sets a new clock ratio.
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*/
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static void longhaul_setstate(unsigned int clock_ratio_index)
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{
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int speed, mult;
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struct cpufreq_freqs freqs;
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union msr_longhaul longhaul;
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union msr_bcr2 bcr2;
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static unsigned int old_ratio=-1;
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if (old_ratio == clock_ratio_index)
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return;
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old_ratio = clock_ratio_index;
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mult = clock_ratio[clock_ratio_index];
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if (mult == -1)
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return;
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speed = calc_speed(mult);
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if ((speed > highest_speed) || (speed < lowest_speed))
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return;
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freqs.old = calc_speed(longhaul_get_cpu_mult());
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freqs.new = speed;
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freqs.cpu = 0; /* longhaul.c is UP only driver */
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cpufreq_notify_transition(&freqs, CPUFREQ_PRECHANGE);
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dprintk ("Setting to FSB:%dMHz Mult:%d.%dx (%s)\n",
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fsb, mult/10, mult%10, print_speed(speed/1000));
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switch (longhaul_version) {
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/*
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* Longhaul v1. (Samuel[C5A] and Samuel2 stepping 0[C5B])
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* Software controlled multipliers only.
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*
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* *NB* Until we get voltage scaling working v1 & v2 are the same code.
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* Longhaul v2 appears in Samuel2 Steppings 1->7 [C5b] and Ezra [C5C]
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*/
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case TYPE_LONGHAUL_V1:
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case TYPE_LONGHAUL_V2:
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rdmsrl (MSR_VIA_BCR2, bcr2.val);
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/* Enable software clock multiplier */
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bcr2.bits.ESOFTBF = 1;
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bcr2.bits.CLOCKMUL = clock_ratio_index;
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local_irq_disable();
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wrmsrl (MSR_VIA_BCR2, bcr2.val);
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safe_halt();
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/* Disable software clock multiplier */
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rdmsrl (MSR_VIA_BCR2, bcr2.val);
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bcr2.bits.ESOFTBF = 0;
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local_irq_disable();
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wrmsrl (MSR_VIA_BCR2, bcr2.val);
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local_irq_enable();
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break;
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/*
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* Longhaul v3 (aka Powersaver). (Ezra-T [C5M] & Nehemiah [C5N])
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* We can scale voltage with this too, but that's currently
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* disabled until we come up with a decent 'match freq to voltage'
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* algorithm.
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* When we add voltage scaling, we will also need to do the
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* voltage/freq setting in order depending on the direction
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* of scaling (like we do in powernow-k7.c)
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* Nehemiah can do FSB scaling too, but this has never been proven
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* to work in practice.
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*/
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case TYPE_POWERSAVER:
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do_powersaver(&longhaul, clock_ratio_index);
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break;
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}
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cpufreq_notify_transition(&freqs, CPUFREQ_POSTCHANGE);
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}
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/*
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* Centaur decided to make life a little more tricky.
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* Only longhaul v1 is allowed to read EBLCR BSEL[0:1].
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* Samuel2 and above have to try and guess what the FSB is.
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* We do this by assuming we booted at maximum multiplier, and interpolate
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* between that value multiplied by possible FSBs and cpu_mhz which
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* was calculated at boot time. Really ugly, but no other way to do this.
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*/
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#define ROUNDING 0xf
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static int _guess(int guess)
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{
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int target;
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target = ((maxmult/10)*guess);
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if (maxmult%10 != 0)
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target += (guess/2);
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target += ROUNDING/2;
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target &= ~ROUNDING;
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return target;
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}
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static int guess_fsb(void)
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{
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int speed = (cpu_khz/1000);
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int i;
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int speeds[3] = { 66, 100, 133 };
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speed += ROUNDING/2;
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speed &= ~ROUNDING;
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for (i=0; i<3; i++) {
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if (_guess(speeds[i]) == speed)
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return speeds[i];
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}
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return 0;
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}
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static int __init longhaul_get_ranges(void)
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{
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unsigned long invalue;
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unsigned int multipliers[32]= {
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50,30,40,100,55,35,45,95,90,70,80,60,120,75,85,65,
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-1,110,120,-1,135,115,125,105,130,150,160,140,-1,155,-1,145 };
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unsigned int j, k = 0;
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union msr_longhaul longhaul;
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unsigned long lo, hi;
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unsigned int eblcr_fsb_table_v1[] = { 66, 133, 100, -1 };
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unsigned int eblcr_fsb_table_v2[] = { 133, 100, -1, 66 };
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switch (longhaul_version) {
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case TYPE_LONGHAUL_V1:
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case TYPE_LONGHAUL_V2:
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/* Ugh, Longhaul v1 didn't have the min/max MSRs.
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Assume min=3.0x & max = whatever we booted at. */
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minmult = 30;
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maxmult = longhaul_get_cpu_mult();
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rdmsr (MSR_IA32_EBL_CR_POWERON, lo, hi);
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invalue = (lo & (1<<18|1<<19)) >>18;
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if (cpu_model==CPU_SAMUEL || cpu_model==CPU_SAMUEL2)
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fsb = eblcr_fsb_table_v1[invalue];
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else
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fsb = guess_fsb();
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break;
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case TYPE_POWERSAVER:
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/* Ezra-T */
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if (cpu_model==CPU_EZRA_T) {
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rdmsrl (MSR_VIA_LONGHAUL, longhaul.val);
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invalue = longhaul.bits.MaxMHzBR;
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if (longhaul.bits.MaxMHzBR4)
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invalue += 16;
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maxmult=multipliers[invalue];
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invalue = longhaul.bits.MinMHzBR;
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if (longhaul.bits.MinMHzBR4 == 1)
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minmult = 30;
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else
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minmult = multipliers[invalue];
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fsb = eblcr_fsb_table_v2[longhaul.bits.MaxMHzFSB];
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break;
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}
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/* Nehemiah */
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if (cpu_model==CPU_NEHEMIAH) {
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rdmsrl (MSR_VIA_LONGHAUL, longhaul.val);
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/*
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* TODO: This code works, but raises a lot of questions.
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* - Some Nehemiah's seem to have broken Min/MaxMHzBR's.
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* We get around this by using a hardcoded multiplier of 4.0x
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* for the minimimum speed, and the speed we booted up at for the max.
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* This is done in longhaul_get_cpu_mult() by reading the EBLCR register.
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* - According to some VIA documentation EBLCR is only
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* in pre-Nehemiah C3s. How this still works is a mystery.
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* We're possibly using something undocumented and unsupported,
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* But it works, so we don't grumble.
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*/
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minmult=40;
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maxmult=longhaul_get_cpu_mult();
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/* Starting with the 1.2GHz parts, theres a 200MHz bus. */
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if ((cpu_khz/1000) > 1200)
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fsb = 200;
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else
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fsb = eblcr_fsb_table_v2[longhaul.bits.MaxMHzFSB];
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break;
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}
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}
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dprintk ("MinMult:%d.%dx MaxMult:%d.%dx\n",
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minmult/10, minmult%10, maxmult/10, maxmult%10);
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if (fsb == -1) {
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printk (KERN_INFO PFX "Invalid (reserved) FSB!\n");
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return -EINVAL;
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}
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highest_speed = calc_speed(maxmult);
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lowest_speed = calc_speed(minmult);
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dprintk ("FSB:%dMHz Lowest speed: %s Highest speed:%s\n", fsb,
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print_speed(lowest_speed/1000),
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print_speed(highest_speed/1000));
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if (lowest_speed == highest_speed) {
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printk (KERN_INFO PFX "highestspeed == lowest, aborting.\n");
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return -EINVAL;
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}
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if (lowest_speed > highest_speed) {
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printk (KERN_INFO PFX "nonsense! lowest (%d > %d) !\n",
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lowest_speed, highest_speed);
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return -EINVAL;
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}
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longhaul_table = kmalloc((numscales + 1) * sizeof(struct cpufreq_frequency_table), GFP_KERNEL);
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if(!longhaul_table)
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return -ENOMEM;
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for (j=0; j < numscales; j++) {
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unsigned int ratio;
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ratio = clock_ratio[j];
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if (ratio == -1)
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continue;
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if (ratio > maxmult || ratio < minmult)
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continue;
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longhaul_table[k].frequency = calc_speed(ratio);
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longhaul_table[k].index = j;
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k++;
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}
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longhaul_table[k].frequency = CPUFREQ_TABLE_END;
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if (!k) {
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kfree (longhaul_table);
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return -EINVAL;
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}
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return 0;
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}
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static void __init longhaul_setup_voltagescaling(void)
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{
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union msr_longhaul longhaul;
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rdmsrl (MSR_VIA_LONGHAUL, longhaul.val);
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if (!(longhaul.bits.RevisionID & 1))
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return;
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minvid = longhaul.bits.MinimumVID;
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maxvid = longhaul.bits.MaximumVID;
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vrmrev = longhaul.bits.VRMRev;
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if (minvid == 0 || maxvid == 0) {
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printk (KERN_INFO PFX "Bogus values Min:%d.%03d Max:%d.%03d. "
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"Voltage scaling disabled.\n",
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minvid/1000, minvid%1000, maxvid/1000, maxvid%1000);
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return;
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}
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if (minvid == maxvid) {
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printk (KERN_INFO PFX "Claims to support voltage scaling but min & max are "
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"both %d.%03d. Voltage scaling disabled\n",
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maxvid/1000, maxvid%1000);
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return;
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}
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if (vrmrev==0) {
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dprintk ("VRM 8.5\n");
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memcpy (voltage_table, vrm85scales, sizeof(voltage_table));
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numvscales = (voltage_table[maxvid]-voltage_table[minvid])/25;
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} else {
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dprintk ("Mobile VRM\n");
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memcpy (voltage_table, mobilevrmscales, sizeof(voltage_table));
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numvscales = (voltage_table[maxvid]-voltage_table[minvid])/5;
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}
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/* Current voltage isn't readable at first, so we need to
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set it to a known value. The spec says to use maxvid */
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longhaul.bits.RevisionKey = longhaul.bits.RevisionID; /* FIXME: This is bad. */
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longhaul.bits.EnableSoftVID = 1;
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longhaul.bits.SoftVID = maxvid;
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wrmsrl (MSR_VIA_LONGHAUL, longhaul.val);
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minvid = voltage_table[minvid];
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maxvid = voltage_table[maxvid];
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dprintk ("Min VID=%d.%03d Max VID=%d.%03d, %d possible voltage scales\n",
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maxvid/1000, maxvid%1000, minvid/1000, minvid%1000, numvscales);
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can_scale_voltage = 1;
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}
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static int longhaul_verify(struct cpufreq_policy *policy)
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{
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return cpufreq_frequency_table_verify(policy, longhaul_table);
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}
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static int longhaul_target(struct cpufreq_policy *policy,
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unsigned int target_freq, unsigned int relation)
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{
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unsigned int table_index = 0;
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unsigned int new_clock_ratio = 0;
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if (cpufreq_frequency_table_target(policy, longhaul_table, target_freq, relation, &table_index))
|
|
return -EINVAL;
|
|
|
|
new_clock_ratio = longhaul_table[table_index].index & 0xFF;
|
|
|
|
longhaul_setstate(new_clock_ratio);
|
|
|
|
return 0;
|
|
}
|
|
|
|
|
|
static unsigned int longhaul_get(unsigned int cpu)
|
|
{
|
|
if (cpu)
|
|
return 0;
|
|
return calc_speed(longhaul_get_cpu_mult());
|
|
}
|
|
|
|
|
|
static int __init longhaul_cpu_init(struct cpufreq_policy *policy)
|
|
{
|
|
struct cpuinfo_x86 *c = cpu_data;
|
|
char *cpuname=NULL;
|
|
int ret;
|
|
|
|
switch (c->x86_model) {
|
|
case 6:
|
|
cpu_model = CPU_SAMUEL;
|
|
cpuname = "C3 'Samuel' [C5A]";
|
|
longhaul_version = TYPE_LONGHAUL_V1;
|
|
memcpy (clock_ratio, samuel1_clock_ratio, sizeof(samuel1_clock_ratio));
|
|
memcpy (eblcr_table, samuel1_eblcr, sizeof(samuel1_eblcr));
|
|
break;
|
|
|
|
case 7:
|
|
longhaul_version = TYPE_LONGHAUL_V1;
|
|
switch (c->x86_mask) {
|
|
case 0:
|
|
cpu_model = CPU_SAMUEL2;
|
|
cpuname = "C3 'Samuel 2' [C5B]";
|
|
/* Note, this is not a typo, early Samuel2's had Samuel1 ratios. */
|
|
memcpy (clock_ratio, samuel1_clock_ratio, sizeof(samuel1_clock_ratio));
|
|
memcpy (eblcr_table, samuel2_eblcr, sizeof(samuel2_eblcr));
|
|
break;
|
|
case 1 ... 15:
|
|
if (c->x86_mask < 8) {
|
|
cpu_model = CPU_SAMUEL2;
|
|
cpuname = "C3 'Samuel 2' [C5B]";
|
|
} else {
|
|
cpu_model = CPU_EZRA;
|
|
cpuname = "C3 'Ezra' [C5C]";
|
|
}
|
|
memcpy (clock_ratio, ezra_clock_ratio, sizeof(ezra_clock_ratio));
|
|
memcpy (eblcr_table, ezra_eblcr, sizeof(ezra_eblcr));
|
|
break;
|
|
}
|
|
break;
|
|
|
|
case 8:
|
|
cpu_model = CPU_EZRA_T;
|
|
cpuname = "C3 'Ezra-T' [C5M]";
|
|
longhaul_version = TYPE_POWERSAVER;
|
|
numscales=32;
|
|
memcpy (clock_ratio, ezrat_clock_ratio, sizeof(ezrat_clock_ratio));
|
|
memcpy (eblcr_table, ezrat_eblcr, sizeof(ezrat_eblcr));
|
|
break;
|
|
|
|
case 9:
|
|
cpu_model = CPU_NEHEMIAH;
|
|
longhaul_version = TYPE_POWERSAVER;
|
|
numscales=32;
|
|
switch (c->x86_mask) {
|
|
case 0 ... 1:
|
|
cpuname = "C3 'Nehemiah A' [C5N]";
|
|
memcpy (clock_ratio, nehemiah_a_clock_ratio, sizeof(nehemiah_a_clock_ratio));
|
|
memcpy (eblcr_table, nehemiah_a_eblcr, sizeof(nehemiah_a_eblcr));
|
|
break;
|
|
case 2 ... 4:
|
|
cpuname = "C3 'Nehemiah B' [C5N]";
|
|
memcpy (clock_ratio, nehemiah_b_clock_ratio, sizeof(nehemiah_b_clock_ratio));
|
|
memcpy (eblcr_table, nehemiah_b_eblcr, sizeof(nehemiah_b_eblcr));
|
|
break;
|
|
case 5 ... 15:
|
|
cpuname = "C3 'Nehemiah C' [C5N]";
|
|
memcpy (clock_ratio, nehemiah_c_clock_ratio, sizeof(nehemiah_c_clock_ratio));
|
|
memcpy (eblcr_table, nehemiah_c_eblcr, sizeof(nehemiah_c_eblcr));
|
|
break;
|
|
}
|
|
break;
|
|
|
|
default:
|
|
cpuname = "Unknown";
|
|
break;
|
|
}
|
|
|
|
printk (KERN_INFO PFX "VIA %s CPU detected. ", cpuname);
|
|
switch (longhaul_version) {
|
|
case TYPE_LONGHAUL_V1:
|
|
case TYPE_LONGHAUL_V2:
|
|
printk ("Longhaul v%d supported.\n", longhaul_version);
|
|
break;
|
|
case TYPE_POWERSAVER:
|
|
printk ("Powersaver supported.\n");
|
|
break;
|
|
};
|
|
|
|
ret = longhaul_get_ranges();
|
|
if (ret != 0)
|
|
return ret;
|
|
|
|
if ((longhaul_version==TYPE_LONGHAUL_V2 || longhaul_version==TYPE_POWERSAVER) &&
|
|
(dont_scale_voltage==0))
|
|
longhaul_setup_voltagescaling();
|
|
|
|
policy->governor = CPUFREQ_DEFAULT_GOVERNOR;
|
|
policy->cpuinfo.transition_latency = 200000; /* nsec */
|
|
policy->cur = calc_speed(longhaul_get_cpu_mult());
|
|
|
|
ret = cpufreq_frequency_table_cpuinfo(policy, longhaul_table);
|
|
if (ret)
|
|
return ret;
|
|
|
|
cpufreq_frequency_table_get_attr(longhaul_table, policy->cpu);
|
|
|
|
return 0;
|
|
}
|
|
|
|
static int __devexit longhaul_cpu_exit(struct cpufreq_policy *policy)
|
|
{
|
|
cpufreq_frequency_table_put_attr(policy->cpu);
|
|
return 0;
|
|
}
|
|
|
|
static struct freq_attr* longhaul_attr[] = {
|
|
&cpufreq_freq_attr_scaling_available_freqs,
|
|
NULL,
|
|
};
|
|
|
|
static struct cpufreq_driver longhaul_driver = {
|
|
.verify = longhaul_verify,
|
|
.target = longhaul_target,
|
|
.get = longhaul_get,
|
|
.init = longhaul_cpu_init,
|
|
.exit = __devexit_p(longhaul_cpu_exit),
|
|
.name = "longhaul",
|
|
.owner = THIS_MODULE,
|
|
.attr = longhaul_attr,
|
|
};
|
|
|
|
|
|
static int __init longhaul_init(void)
|
|
{
|
|
struct cpuinfo_x86 *c = cpu_data;
|
|
|
|
if (c->x86_vendor != X86_VENDOR_CENTAUR || c->x86 != 6)
|
|
return -ENODEV;
|
|
|
|
switch (c->x86_model) {
|
|
case 6 ... 9:
|
|
return cpufreq_register_driver(&longhaul_driver);
|
|
default:
|
|
printk (KERN_INFO PFX "Unknown VIA CPU. Contact davej@codemonkey.org.uk\n");
|
|
}
|
|
|
|
return -ENODEV;
|
|
}
|
|
|
|
|
|
static void __exit longhaul_exit(void)
|
|
{
|
|
int i=0;
|
|
|
|
for (i=0; i < numscales; i++) {
|
|
if (clock_ratio[i] == maxmult) {
|
|
longhaul_setstate(i);
|
|
break;
|
|
}
|
|
}
|
|
|
|
cpufreq_unregister_driver(&longhaul_driver);
|
|
kfree(longhaul_table);
|
|
}
|
|
|
|
module_param (dont_scale_voltage, int, 0644);
|
|
MODULE_PARM_DESC(dont_scale_voltage, "Don't scale voltage of processor");
|
|
|
|
MODULE_AUTHOR ("Dave Jones <davej@codemonkey.org.uk>");
|
|
MODULE_DESCRIPTION ("Longhaul driver for VIA Cyrix processors.");
|
|
MODULE_LICENSE ("GPL");
|
|
|
|
module_init(longhaul_init);
|
|
module_exit(longhaul_exit);
|
|
|