29a50a8bd0
If on a rev. 2.1, adjust UCC clock and data timing characteristics as specified in the rev.2.1 erratum #2. Signed-off-by: Kim Phillips <kim.phillips@freescale.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org> |
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cell | ||
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chrp | ||
embedded6xx | ||
iseries | ||
maple | ||
pasemi | ||
powermac | ||
prep | ||
ps3 | ||
pseries | ||
fsl_uli1575.c | ||
Kconfig | ||
Kconfig.cputype | ||
Makefile |