62fdd7678a
The patch contains Intel IOMMU IA64 specific code. It defines new machvec dig_vtd, hooks for IOMMU, DMAR table detection, cache line flush function, etc. For a generic kernel with CONFIG_DMAR=y, if Intel IOMMU is detected, dig_vtd is used for machinve vector. Otherwise, kernel falls back to dig machine vector. Kernel parameter "machvec=dig" or "intel_iommu=off" can be used to force kernel to boot dig machine vector. Signed-off-by: Fenghua Yu <fenghua.yu@intel.com> Signed-off-by: Tony Luck <tony.luck@intel.com>
150 lines
5.0 KiB
C
150 lines
5.0 KiB
C
#ifndef _ASM_IA64_DMA_MAPPING_H
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#define _ASM_IA64_DMA_MAPPING_H
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/*
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* Copyright (C) 2003-2004 Hewlett-Packard Co
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* David Mosberger-Tang <davidm@hpl.hp.com>
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*/
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#include <asm/machvec.h>
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#include <linux/scatterlist.h>
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#include <asm/swiotlb.h>
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struct dma_mapping_ops {
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int (*mapping_error)(struct device *dev,
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dma_addr_t dma_addr);
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void* (*alloc_coherent)(struct device *dev, size_t size,
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dma_addr_t *dma_handle, gfp_t gfp);
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void (*free_coherent)(struct device *dev, size_t size,
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void *vaddr, dma_addr_t dma_handle);
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dma_addr_t (*map_single)(struct device *hwdev, unsigned long ptr,
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size_t size, int direction);
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void (*unmap_single)(struct device *dev, dma_addr_t addr,
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size_t size, int direction);
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void (*sync_single_for_cpu)(struct device *hwdev,
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dma_addr_t dma_handle, size_t size,
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int direction);
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void (*sync_single_for_device)(struct device *hwdev,
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dma_addr_t dma_handle, size_t size,
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int direction);
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void (*sync_single_range_for_cpu)(struct device *hwdev,
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dma_addr_t dma_handle, unsigned long offset,
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size_t size, int direction);
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void (*sync_single_range_for_device)(struct device *hwdev,
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dma_addr_t dma_handle, unsigned long offset,
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size_t size, int direction);
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void (*sync_sg_for_cpu)(struct device *hwdev,
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struct scatterlist *sg, int nelems,
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int direction);
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void (*sync_sg_for_device)(struct device *hwdev,
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struct scatterlist *sg, int nelems,
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int direction);
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int (*map_sg)(struct device *hwdev, struct scatterlist *sg,
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int nents, int direction);
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void (*unmap_sg)(struct device *hwdev,
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struct scatterlist *sg, int nents,
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int direction);
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int (*dma_supported_op)(struct device *hwdev, u64 mask);
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int is_phys;
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};
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extern struct dma_mapping_ops *dma_ops;
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extern struct ia64_machine_vector ia64_mv;
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extern void set_iommu_machvec(void);
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#define dma_alloc_coherent(dev, size, handle, gfp) \
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platform_dma_alloc_coherent(dev, size, handle, (gfp) | GFP_DMA)
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/* coherent mem. is cheap */
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static inline void *
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dma_alloc_noncoherent(struct device *dev, size_t size, dma_addr_t *dma_handle,
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gfp_t flag)
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{
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return dma_alloc_coherent(dev, size, dma_handle, flag);
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}
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#define dma_free_coherent platform_dma_free_coherent
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static inline void
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dma_free_noncoherent(struct device *dev, size_t size, void *cpu_addr,
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dma_addr_t dma_handle)
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{
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dma_free_coherent(dev, size, cpu_addr, dma_handle);
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}
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#define dma_map_single_attrs platform_dma_map_single_attrs
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static inline dma_addr_t dma_map_single(struct device *dev, void *cpu_addr,
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size_t size, int dir)
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{
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return dma_map_single_attrs(dev, cpu_addr, size, dir, NULL);
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}
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#define dma_map_sg_attrs platform_dma_map_sg_attrs
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static inline int dma_map_sg(struct device *dev, struct scatterlist *sgl,
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int nents, int dir)
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{
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return dma_map_sg_attrs(dev, sgl, nents, dir, NULL);
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}
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#define dma_unmap_single_attrs platform_dma_unmap_single_attrs
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static inline void dma_unmap_single(struct device *dev, dma_addr_t cpu_addr,
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size_t size, int dir)
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{
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return dma_unmap_single_attrs(dev, cpu_addr, size, dir, NULL);
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}
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#define dma_unmap_sg_attrs platform_dma_unmap_sg_attrs
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static inline void dma_unmap_sg(struct device *dev, struct scatterlist *sgl,
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int nents, int dir)
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{
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return dma_unmap_sg_attrs(dev, sgl, nents, dir, NULL);
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}
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#define dma_sync_single_for_cpu platform_dma_sync_single_for_cpu
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#define dma_sync_sg_for_cpu platform_dma_sync_sg_for_cpu
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#define dma_sync_single_for_device platform_dma_sync_single_for_device
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#define dma_sync_sg_for_device platform_dma_sync_sg_for_device
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#define dma_mapping_error platform_dma_mapping_error
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#define dma_map_page(dev, pg, off, size, dir) \
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dma_map_single(dev, page_address(pg) + (off), (size), (dir))
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#define dma_unmap_page(dev, dma_addr, size, dir) \
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dma_unmap_single(dev, dma_addr, size, dir)
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/*
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* Rest of this file is part of the "Advanced DMA API". Use at your own risk.
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* See Documentation/DMA-API.txt for details.
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*/
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#define dma_sync_single_range_for_cpu(dev, dma_handle, offset, size, dir) \
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dma_sync_single_for_cpu(dev, dma_handle, size, dir)
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#define dma_sync_single_range_for_device(dev, dma_handle, offset, size, dir) \
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dma_sync_single_for_device(dev, dma_handle, size, dir)
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#define dma_supported platform_dma_supported
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static inline int
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dma_set_mask (struct device *dev, u64 mask)
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{
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if (!dev->dma_mask || !dma_supported(dev, mask))
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return -EIO;
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*dev->dma_mask = mask;
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return 0;
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}
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extern int dma_get_cache_alignment(void);
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static inline void
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dma_cache_sync (struct device *dev, void *vaddr, size_t size,
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enum dma_data_direction dir)
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{
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/*
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* IA-64 is cache-coherent, so this is mostly a no-op. However, we do need to
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* ensure that dma_cache_sync() enforces order, hence the mb().
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*/
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mb();
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}
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#define dma_is_consistent(d, h) (1) /* all we do is coherent memory... */
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static inline struct dma_mapping_ops *get_dma_ops(struct device *dev)
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{
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return dma_ops;
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}
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#endif /* _ASM_IA64_DMA_MAPPING_H */
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