554d7209c8
Reading single registers did not pay attention to data endianness. This patch fix that. Signed-off-by: Juuso Oikarinen <juuso.oikarinen@nokia.com> Reviewed-by: Luciano Coelho <luciano.coelho@nokia.com> Signed-off-by: Luciano Coelho <luciano.coelho@nokia.com> Signed-off-by: John W. Linville <linville@tuxdriver.com>
170 lines
4.9 KiB
C
170 lines
4.9 KiB
C
/*
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* This file is part of wl1271
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*
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* Copyright (C) 1998-2009 Texas Instruments. All rights reserved.
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* Copyright (C) 2008-2010 Nokia Corporation
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*
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* Contact: Luciano Coelho <luciano.coelho@nokia.com>
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*
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* This program is free software; you can redistribute it and/or
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* modify it under the terms of the GNU General Public License
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* version 2 as published by the Free Software Foundation.
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*
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* This program is distributed in the hope that it will be useful, but
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* WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
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* General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, write to the Free Software
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* Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA
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* 02110-1301 USA
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*
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*/
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#ifndef __WL1271_IO_H__
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#define __WL1271_IO_H__
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#include "wl1271_reg.h"
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#define HW_ACCESS_MEMORY_MAX_RANGE 0x1FFC0
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#define HW_PARTITION_REGISTERS_ADDR 0x1FFC0
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#define HW_PART0_SIZE_ADDR (HW_PARTITION_REGISTERS_ADDR)
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#define HW_PART0_START_ADDR (HW_PARTITION_REGISTERS_ADDR + 4)
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#define HW_PART1_SIZE_ADDR (HW_PARTITION_REGISTERS_ADDR + 8)
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#define HW_PART1_START_ADDR (HW_PARTITION_REGISTERS_ADDR + 12)
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#define HW_PART2_SIZE_ADDR (HW_PARTITION_REGISTERS_ADDR + 16)
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#define HW_PART2_START_ADDR (HW_PARTITION_REGISTERS_ADDR + 20)
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#define HW_PART3_START_ADDR (HW_PARTITION_REGISTERS_ADDR + 24)
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#define HW_ACCESS_REGISTER_SIZE 4
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#define HW_ACCESS_PRAM_MAX_RANGE 0x3c000
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struct wl1271;
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void wl1271_disable_interrupts(struct wl1271 *wl);
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void wl1271_enable_interrupts(struct wl1271 *wl);
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void wl1271_io_reset(struct wl1271 *wl);
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void wl1271_io_init(struct wl1271 *wl);
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static inline struct device *wl1271_wl_to_dev(struct wl1271 *wl)
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{
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return wl->if_ops->dev(wl);
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}
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/* Raw target IO, address is not translated */
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static inline void wl1271_raw_write(struct wl1271 *wl, int addr, void *buf,
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size_t len, bool fixed)
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{
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wl->if_ops->write(wl, addr, buf, len, fixed);
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}
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static inline void wl1271_raw_read(struct wl1271 *wl, int addr, void *buf,
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size_t len, bool fixed)
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{
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wl->if_ops->read(wl, addr, buf, len, fixed);
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}
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static inline u32 wl1271_raw_read32(struct wl1271 *wl, int addr)
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{
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wl1271_raw_read(wl, addr, &wl->buffer_32,
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sizeof(wl->buffer_32), false);
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return le32_to_cpu(wl->buffer_32);
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}
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static inline void wl1271_raw_write32(struct wl1271 *wl, int addr, u32 val)
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{
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wl->buffer_32 = cpu_to_le32(val);
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wl1271_raw_write(wl, addr, &wl->buffer_32,
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sizeof(wl->buffer_32), false);
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}
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/* Translated target IO */
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static inline int wl1271_translate_addr(struct wl1271 *wl, int addr)
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{
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/*
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* To translate, first check to which window of addresses the
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* particular address belongs. Then subtract the starting address
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* of that window from the address. Then, add offset of the
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* translated region.
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*
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* The translated regions occur next to each other in physical device
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* memory, so just add the sizes of the preceeding address regions to
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* get the offset to the new region.
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*
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* Currently, only the two first regions are addressed, and the
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* assumption is that all addresses will fall into either of those
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* two.
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*/
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if ((addr >= wl->part.reg.start) &&
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(addr < wl->part.reg.start + wl->part.reg.size))
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return addr - wl->part.reg.start + wl->part.mem.size;
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else
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return addr - wl->part.mem.start;
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}
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static inline void wl1271_read(struct wl1271 *wl, int addr, void *buf,
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size_t len, bool fixed)
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{
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int physical;
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physical = wl1271_translate_addr(wl, addr);
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wl1271_raw_read(wl, physical, buf, len, fixed);
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}
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static inline void wl1271_write(struct wl1271 *wl, int addr, void *buf,
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size_t len, bool fixed)
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{
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int physical;
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physical = wl1271_translate_addr(wl, addr);
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wl1271_raw_write(wl, physical, buf, len, fixed);
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}
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static inline u32 wl1271_read32(struct wl1271 *wl, int addr)
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{
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return wl1271_raw_read32(wl, wl1271_translate_addr(wl, addr));
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}
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static inline void wl1271_write32(struct wl1271 *wl, int addr, u32 val)
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{
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wl1271_raw_write32(wl, wl1271_translate_addr(wl, addr), val);
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}
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static inline void wl1271_power_off(struct wl1271 *wl)
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{
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wl->if_ops->power(wl, false);
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clear_bit(WL1271_FLAG_GPIO_POWER, &wl->flags);
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}
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static inline void wl1271_power_on(struct wl1271 *wl)
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{
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wl->if_ops->power(wl, true);
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set_bit(WL1271_FLAG_GPIO_POWER, &wl->flags);
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}
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/* Top Register IO */
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void wl1271_top_reg_write(struct wl1271 *wl, int addr, u16 val);
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u16 wl1271_top_reg_read(struct wl1271 *wl, int addr);
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int wl1271_set_partition(struct wl1271 *wl,
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struct wl1271_partition_set *p);
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/* Functions from wl1271_main.c */
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int wl1271_register_hw(struct wl1271 *wl);
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void wl1271_unregister_hw(struct wl1271 *wl);
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int wl1271_init_ieee80211(struct wl1271 *wl);
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struct ieee80211_hw *wl1271_alloc_hw(void);
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int wl1271_free_hw(struct wl1271 *wl);
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#endif
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