4162d7e363
GPIO register and configuration definitions for GPIO banks G, H, I and J. Signed-off-by: Ben Dooks <ben-linux@fluff.org>
41 lines
1.5 KiB
C
41 lines
1.5 KiB
C
/* linux/arch/arm/plat-s3c64xx/include/plat/gpio-bank-i.h
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*
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* Copyright 2008 Openmoko, Inc.
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* Copyright 2008 Simtec Electronics
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* Ben Dooks <ben@simtec.co.uk>
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* http://armlinux.simtec.co.uk/
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*
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* GPIO Bank I register and configuration definitions
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License version 2 as
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* published by the Free Software Foundation.
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*/
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#define S3C64XX_GPICON (S3C64XX_GPI_BASE + 0x00)
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#define S3C64XX_GPIDAT (S3C64XX_GPI_BASE + 0x04)
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#define S3C64XX_GPIPUD (S3C64XX_GPI_BASE + 0x08)
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#define S3C64XX_GPICONSLP (S3C64XX_GPI_BASE + 0x0c)
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#define S3C64XX_GPIPUDSLP (S3C64XX_GPI_BASE + 0x10)
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#define S3C64XX_GPI_CONMASK(__gpio) (0x3 << ((__gpio) * 2))
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#define S3C64XX_GPI_INPUT(__gpio) (0x0 << ((__gpio) * 2))
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#define S3C64XX_GPI_OUTPUT(__gpio) (0x1 << ((__gpio) * 2))
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#define S3C64XX_GPI0_VD0 (0x02 << 0)
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#define S3C64XX_GPI1_VD1 (0x02 << 2)
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#define S3C64XX_GPI2_VD2 (0x02 << 4)
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#define S3C64XX_GPI3_VD3 (0x02 << 6)
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#define S3C64XX_GPI4_VD4 (0x02 << 8)
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#define S3C64XX_GPI5_VD5 (0x02 << 10)
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#define S3C64XX_GPI6_VD6 (0x02 << 12)
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#define S3C64XX_GPI7_VD7 (0x02 << 14)
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#define S3C64XX_GPI8_VD8 (0x02 << 16)
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#define S3C64XX_GPI9_VD9 (0x02 << 18)
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#define S3C64XX_GPI10_VD10 (0x02 << 20)
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#define S3C64XX_GPI11_VD11 (0x02 << 22)
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#define S3C64XX_GPI12_VD12 (0x02 << 24)
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#define S3C64XX_GPI13_VD13 (0x02 << 26)
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#define S3C64XX_GPI14_VD14 (0x02 << 28)
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#define S3C64XX_GPI15_VD15 (0x02 << 30)
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