2d4dc890b5
Mtdblock driver doesn't call flush_dcache_page for pages in request. So, this causes problems on architectures where the icache doesn't fill from the dcache or with dcache aliases. The patch fixes this. The ARCH_IMPLEMENTS_FLUSH_DCACHE_PAGE symbol was introduced to avoid pointless empty cache-thrashing loops on architectures for which flush_dcache_page() is a no-op. Every architecture was provided with this flush pages on architectires where ARCH_IMPLEMENTS_FLUSH_DCACHE_PAGE is equal 1 or do nothing otherwise. See "fix mtd_blkdevs problem with caches on some architectures" discussion on LKML for more information. Signed-off-by: Ilya Loginov <isloginov@gmail.com> Cc: Ingo Molnar <mingo@elte.hu> Cc: David Woodhouse <dwmw2@infradead.org> Cc: Peter Horton <phorton@bitbox.co.uk> Cc: "Ed L. Cashin" <ecashin@coraid.com> Signed-off-by: Jens Axboe <jens.axboe@oracle.com>
105 lines
3.6 KiB
C
105 lines
3.6 KiB
C
/*
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* Copyright (C) 2007-2009 Michal Simek <monstr@monstr.eu>
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* Copyright (C) 2007-2009 PetaLogix
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* Copyright (C) 2007 John Williams <john.williams@petalogix.com>
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* based on v850 version which was
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* Copyright (C) 2001,02,03 NEC Electronics Corporation
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* Copyright (C) 2001,02,03 Miles Bader <miles@gnu.org>
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*
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* This file is subject to the terms and conditions of the GNU General
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* Public License. See the file COPYING in the main directory of this
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* archive for more details.
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*
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*/
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#ifndef _ASM_MICROBLAZE_CACHEFLUSH_H
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#define _ASM_MICROBLAZE_CACHEFLUSH_H
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/* Somebody depends on this; sigh... */
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#include <linux/mm.h>
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/*
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* Cache handling functions.
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* Microblaze has a write-through data cache, meaning that the data cache
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* never needs to be flushed. The only flushing operations that are
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* implemented are to invalidate the instruction cache. These are called
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* after loading a user application into memory, we must invalidate the
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* instruction cache to make sure we don't fetch old, bad code.
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*/
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/* FIXME for LL-temac driver */
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#define invalidate_dcache_range(start, end) \
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__invalidate_dcache_range(start, end)
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#define flush_cache_all() __invalidate_cache_all()
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#define flush_cache_mm(mm) do { } while (0)
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#define flush_cache_range(vma, start, end) __invalidate_cache_all()
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#define flush_cache_page(vma, vmaddr, pfn) do { } while (0)
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#define flush_dcache_range(start, end) __invalidate_dcache_range(start, end)
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#define ARCH_IMPLEMENTS_FLUSH_DCACHE_PAGE 0
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#define flush_dcache_page(page) do { } while (0)
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#define flush_dcache_mmap_lock(mapping) do { } while (0)
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#define flush_dcache_mmap_unlock(mapping) do { } while (0)
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#define flush_icache_range(start, len) __invalidate_icache_range(start, len)
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#define flush_icache_page(vma, pg) do { } while (0)
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#ifndef CONFIG_MMU
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# define flush_icache_user_range(start, len) do { } while (0)
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#else
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# define flush_icache_user_range(vma, pg, adr, len) __invalidate_icache_all()
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# define flush_page_to_ram(page) do { } while (0)
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# define flush_icache() __invalidate_icache_all()
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# define flush_cache_sigtramp(vaddr) \
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__invalidate_icache_range(vaddr, vaddr + 8)
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# define flush_dcache_mmap_lock(mapping) do { } while (0)
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# define flush_dcache_mmap_unlock(mapping) do { } while (0)
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# define flush_cache_dup_mm(mm) do { } while (0)
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#endif
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#define flush_cache_vmap(start, end) do { } while (0)
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#define flush_cache_vunmap(start, end) do { } while (0)
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struct page;
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struct mm_struct;
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struct vm_area_struct;
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/* see arch/microblaze/kernel/cache.c */
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extern void __invalidate_icache_all(void);
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extern void __invalidate_icache_range(unsigned long start, unsigned long end);
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extern void __invalidate_icache_page(struct vm_area_struct *vma,
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struct page *page);
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extern void __invalidate_icache_user_range(struct vm_area_struct *vma,
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struct page *page,
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unsigned long adr, int len);
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extern void __invalidate_cache_sigtramp(unsigned long addr);
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extern void __invalidate_dcache_all(void);
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extern void __invalidate_dcache_range(unsigned long start, unsigned long end);
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extern void __invalidate_dcache_page(struct vm_area_struct *vma,
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struct page *page);
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extern void __invalidate_dcache_user_range(struct vm_area_struct *vma,
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struct page *page,
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unsigned long adr, int len);
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extern inline void __invalidate_cache_all(void)
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{
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__invalidate_icache_all();
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__invalidate_dcache_all();
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}
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#define copy_to_user_page(vma, page, vaddr, dst, src, len) \
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do { memcpy((dst), (src), (len)); \
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flush_icache_range((unsigned) (dst), (unsigned) (dst) + (len)); \
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} while (0)
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#define copy_from_user_page(vma, page, vaddr, dst, src, len) \
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memcpy((dst), (src), (len))
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#endif /* _ASM_MICROBLAZE_CACHEFLUSH_H */
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