ce9c008c8b
Export the LCD panel size for sh_mobile_lcdc boards. This allows us to perform dpi and screen aspect ratio calculations in user space. Signed-off-by: Magnus Damm <damm@igel.co.jp> Signed-off-by: Paul Mundt <lethal@linux-sh.org>
536 lines
14 KiB
C
536 lines
14 KiB
C
/*
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* Renesas System Solutions Asia Pte. Ltd - Migo-R
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*
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* Copyright (C) 2008 Magnus Damm
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*
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* This file is subject to the terms and conditions of the GNU General Public
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* License. See the file "COPYING" in the main directory of this archive
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* for more details.
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*/
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#include <linux/init.h>
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#include <linux/platform_device.h>
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#include <linux/interrupt.h>
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#include <linux/input.h>
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#include <linux/mtd/physmap.h>
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#include <linux/mtd/nand.h>
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#include <linux/i2c.h>
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#include <linux/smc91x.h>
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#include <linux/delay.h>
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#include <linux/clk.h>
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#include <media/soc_camera_platform.h>
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#include <media/sh_mobile_ceu.h>
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#include <asm/clock.h>
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#include <asm/machvec.h>
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#include <asm/io.h>
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#include <asm/sh_keysc.h>
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#include <asm/sh_mobile_lcdc.h>
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#include <asm/migor.h>
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/* Address IRQ Size Bus Description
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* 0x00000000 64MB 16 NOR Flash (SP29PL256N)
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* 0x0c000000 64MB 64 SDRAM (2xK4M563233G)
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* 0x10000000 IRQ0 16 Ethernet (SMC91C111)
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* 0x14000000 IRQ4 16 USB 2.0 Host Controller (M66596)
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* 0x18000000 8GB 8 NAND Flash (K9K8G08U0A)
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*/
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static struct smc91x_platdata smc91x_info = {
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.flags = SMC91X_USE_16BIT,
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};
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static struct resource smc91x_eth_resources[] = {
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[0] = {
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.name = "SMC91C111" ,
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.start = 0x10000300,
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.end = 0x1000030f,
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.flags = IORESOURCE_MEM,
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},
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[1] = {
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.start = 32, /* IRQ0 */
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.flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHLEVEL,
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},
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};
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static struct platform_device smc91x_eth_device = {
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.name = "smc91x",
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.num_resources = ARRAY_SIZE(smc91x_eth_resources),
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.resource = smc91x_eth_resources,
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.dev = {
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.platform_data = &smc91x_info,
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},
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};
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static struct sh_keysc_info sh_keysc_info = {
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.mode = SH_KEYSC_MODE_2, /* KEYOUT0->4, KEYIN1->5 */
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.scan_timing = 3,
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.delay = 5,
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.keycodes = {
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0, KEY_UP, KEY_DOWN, KEY_LEFT, KEY_RIGHT, KEY_ENTER,
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0, KEY_F, KEY_C, KEY_D, KEY_H, KEY_1,
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0, KEY_2, KEY_3, KEY_4, KEY_5, KEY_6,
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0, KEY_7, KEY_8, KEY_9, KEY_S, KEY_0,
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0, KEY_P, KEY_STOP, KEY_REWIND, KEY_PLAY, KEY_FASTFORWARD,
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},
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};
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static struct resource sh_keysc_resources[] = {
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[0] = {
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.start = 0x044b0000,
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.end = 0x044b000f,
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.flags = IORESOURCE_MEM,
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},
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[1] = {
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.start = 79,
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.flags = IORESOURCE_IRQ,
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},
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};
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static struct platform_device sh_keysc_device = {
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.name = "sh_keysc",
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.num_resources = ARRAY_SIZE(sh_keysc_resources),
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.resource = sh_keysc_resources,
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.dev = {
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.platform_data = &sh_keysc_info,
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},
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};
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static struct mtd_partition migor_nor_flash_partitions[] =
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{
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{
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.name = "uboot",
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.offset = 0,
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.size = (1 * 1024 * 1024),
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.mask_flags = MTD_WRITEABLE, /* Read-only */
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},
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{
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.name = "rootfs",
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.offset = MTDPART_OFS_APPEND,
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.size = (15 * 1024 * 1024),
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},
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{
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.name = "other",
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.offset = MTDPART_OFS_APPEND,
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.size = MTDPART_SIZ_FULL,
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},
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};
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static struct physmap_flash_data migor_nor_flash_data = {
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.width = 2,
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.parts = migor_nor_flash_partitions,
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.nr_parts = ARRAY_SIZE(migor_nor_flash_partitions),
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};
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static struct resource migor_nor_flash_resources[] = {
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[0] = {
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.name = "NOR Flash",
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.start = 0x00000000,
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.end = 0x03ffffff,
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.flags = IORESOURCE_MEM,
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}
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};
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static struct platform_device migor_nor_flash_device = {
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.name = "physmap-flash",
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.resource = migor_nor_flash_resources,
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.num_resources = ARRAY_SIZE(migor_nor_flash_resources),
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.dev = {
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.platform_data = &migor_nor_flash_data,
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},
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};
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static struct mtd_partition migor_nand_flash_partitions[] = {
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{
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.name = "nanddata1",
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.offset = 0x0,
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.size = 512 * 1024 * 1024,
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},
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{
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.name = "nanddata2",
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.offset = MTDPART_OFS_APPEND,
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.size = 512 * 1024 * 1024,
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},
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};
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static void migor_nand_flash_cmd_ctl(struct mtd_info *mtd, int cmd,
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unsigned int ctrl)
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{
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struct nand_chip *chip = mtd->priv;
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if (cmd == NAND_CMD_NONE)
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return;
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if (ctrl & NAND_CLE)
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writeb(cmd, chip->IO_ADDR_W + 0x00400000);
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else if (ctrl & NAND_ALE)
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writeb(cmd, chip->IO_ADDR_W + 0x00800000);
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else
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writeb(cmd, chip->IO_ADDR_W);
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}
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static int migor_nand_flash_ready(struct mtd_info *mtd)
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{
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return ctrl_inb(PORT_PADR) & 0x02; /* PTA1 */
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}
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struct platform_nand_data migor_nand_flash_data = {
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.chip = {
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.nr_chips = 1,
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.partitions = migor_nand_flash_partitions,
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.nr_partitions = ARRAY_SIZE(migor_nand_flash_partitions),
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.chip_delay = 20,
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.part_probe_types = (const char *[]) { "cmdlinepart", NULL },
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},
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.ctrl = {
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.dev_ready = migor_nand_flash_ready,
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.cmd_ctrl = migor_nand_flash_cmd_ctl,
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},
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};
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static struct resource migor_nand_flash_resources[] = {
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[0] = {
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.name = "NAND Flash",
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.start = 0x18000000,
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.end = 0x18ffffff,
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.flags = IORESOURCE_MEM,
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},
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};
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static struct platform_device migor_nand_flash_device = {
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.name = "gen_nand",
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.resource = migor_nand_flash_resources,
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.num_resources = ARRAY_SIZE(migor_nand_flash_resources),
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.dev = {
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.platform_data = &migor_nand_flash_data,
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}
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};
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static struct sh_mobile_lcdc_info sh_mobile_lcdc_info = {
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#ifdef CONFIG_SH_MIGOR_RTA_WVGA
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.clock_source = LCDC_CLK_BUS,
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.ch[0] = {
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.chan = LCDC_CHAN_MAINLCD,
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.bpp = 16,
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.interface_type = RGB16,
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.clock_divider = 2,
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.lcd_cfg = {
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.name = "LB070WV1",
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.xres = 800,
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.yres = 480,
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.left_margin = 64,
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.right_margin = 16,
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.hsync_len = 120,
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.upper_margin = 1,
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.lower_margin = 17,
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.vsync_len = 2,
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.sync = 0,
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},
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.lcd_size_cfg = { /* 7.0 inch */
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.width = 152,
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.height = 91,
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},
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}
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#endif
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#ifdef CONFIG_SH_MIGOR_QVGA
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.clock_source = LCDC_CLK_PERIPHERAL,
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.ch[0] = {
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.chan = LCDC_CHAN_MAINLCD,
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.bpp = 16,
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.interface_type = SYS16A,
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.clock_divider = 10,
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.lcd_cfg = {
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.name = "PH240320T",
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.xres = 320,
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.yres = 240,
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.left_margin = 0,
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.right_margin = 16,
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.hsync_len = 8,
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.upper_margin = 1,
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.lower_margin = 17,
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.vsync_len = 2,
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.sync = FB_SYNC_HOR_HIGH_ACT,
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},
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.lcd_size_cfg = { /* 2.4 inch */
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.width = 49,
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.height = 37,
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},
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.board_cfg = {
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.setup_sys = migor_lcd_qvga_setup,
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},
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.sys_bus_cfg = {
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.ldmt2r = 0x06000a09,
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.ldmt3r = 0x180e3418,
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},
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}
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#endif
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};
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static struct resource migor_lcdc_resources[] = {
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[0] = {
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.name = "LCDC",
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.start = 0xfe940000, /* P4-only space */
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.end = 0xfe941fff,
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.flags = IORESOURCE_MEM,
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},
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};
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static struct platform_device migor_lcdc_device = {
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.name = "sh_mobile_lcdc_fb",
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.num_resources = ARRAY_SIZE(migor_lcdc_resources),
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.resource = migor_lcdc_resources,
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.dev = {
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.platform_data = &sh_mobile_lcdc_info,
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},
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};
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static struct clk *camera_clk;
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static void camera_power_on(void)
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{
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unsigned char value;
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camera_clk = clk_get(NULL, "video_clk");
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clk_set_rate(camera_clk, 24000000);
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clk_enable(camera_clk); /* start VIO_CKO */
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mdelay(10);
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value = ctrl_inb(PORT_PTDR);
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value &= ~0x09;
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#ifndef CONFIG_SH_MIGOR_RTA_WVGA
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value |= 0x01;
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#endif
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ctrl_outb(value, PORT_PTDR);
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mdelay(10);
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ctrl_outb(value | 8, PORT_PTDR);
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}
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static void camera_power_off(void)
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{
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clk_disable(camera_clk); /* stop VIO_CKO */
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clk_put(camera_clk);
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ctrl_outb(ctrl_inb(PORT_PTDR) & ~0x08, PORT_PTDR);
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}
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#ifdef CONFIG_I2C
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static unsigned char camera_ov772x_magic[] =
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{
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0x09, 0x01, 0x0c, 0x10, 0x0d, 0x41, 0x0e, 0x01,
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0x12, 0x00, 0x13, 0x8F, 0x14, 0x4A, 0x15, 0x00,
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0x16, 0x00, 0x17, 0x23, 0x18, 0xa0, 0x19, 0x07,
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0x1a, 0xf0, 0x1b, 0x40, 0x1f, 0x00, 0x20, 0x10,
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0x22, 0xff, 0x23, 0x01, 0x28, 0x00, 0x29, 0xa0,
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0x2a, 0x00, 0x2b, 0x00, 0x2c, 0xf0, 0x2d, 0x00,
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0x2e, 0x00, 0x30, 0x80, 0x31, 0x60, 0x32, 0x00,
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0x33, 0x00, 0x34, 0x00, 0x3d, 0x80, 0x3e, 0xe2,
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0x3f, 0x1f, 0x42, 0x80, 0x43, 0x80, 0x44, 0x80,
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0x45, 0x80, 0x46, 0x00, 0x47, 0x00, 0x48, 0x00,
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0x49, 0x50, 0x4a, 0x30, 0x4b, 0x50, 0x4c, 0x50,
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0x4d, 0x00, 0x4e, 0xef, 0x4f, 0x10, 0x50, 0x60,
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0x51, 0x00, 0x52, 0x00, 0x53, 0x24, 0x54, 0x7a,
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0x55, 0xfc, 0x62, 0xff, 0x63, 0xf0, 0x64, 0x1f,
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0x65, 0x00, 0x66, 0x10, 0x67, 0x00, 0x68, 0x00,
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0x69, 0x5c, 0x6a, 0x11, 0x6b, 0xa2, 0x6c, 0x01,
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0x6d, 0x50, 0x6e, 0x80, 0x6f, 0x80, 0x70, 0x0f,
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0x71, 0x00, 0x72, 0x00, 0x73, 0x0f, 0x74, 0x0f,
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0x75, 0xff, 0x78, 0x10, 0x79, 0x70, 0x7a, 0x70,
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0x7b, 0xf0, 0x7c, 0xf0, 0x7d, 0xf0, 0x7e, 0x0e,
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0x7f, 0x1a, 0x80, 0x31, 0x81, 0x5a, 0x82, 0x69,
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0x83, 0x75, 0x84, 0x7e, 0x85, 0x88, 0x86, 0x8f,
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0x87, 0x96, 0x88, 0xa3, 0x89, 0xaf, 0x8a, 0xc4,
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0x8b, 0xd7, 0x8c, 0xe8, 0x8d, 0x20, 0x8e, 0x00,
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0x8f, 0x00, 0x90, 0x08, 0x91, 0x10, 0x92, 0x1f,
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0x93, 0x01, 0x94, 0x2c, 0x95, 0x24, 0x96, 0x08,
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0x97, 0x14, 0x98, 0x24, 0x99, 0x38, 0x9a, 0x9e,
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0x9b, 0x00, 0x9c, 0x40, 0x9e, 0x11, 0x9f, 0x02,
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0xa0, 0x00, 0xa1, 0x40, 0xa2, 0x40, 0xa3, 0x06,
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0xa4, 0x00, 0xa6, 0x00, 0xa7, 0x40, 0xa8, 0x40,
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0xa9, 0x80, 0xaa, 0x80, 0xab, 0x06, 0xac, 0xff,
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0x12, 0x06, 0x64, 0x3f, 0x12, 0x46, 0x17, 0x3f,
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0x18, 0x50, 0x19, 0x03, 0x1a, 0x78, 0x29, 0x50,
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0x2c, 0x78,
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};
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static int ov772x_set_capture(struct soc_camera_platform_info *info,
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int enable)
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{
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struct i2c_adapter *a = i2c_get_adapter(0);
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struct i2c_msg msg;
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int ret = 0;
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int i;
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if (!enable)
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return 0; /* camera_power_off() is enough */
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for (i = 0; i < ARRAY_SIZE(camera_ov772x_magic); i += 2) {
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u_int8_t buf[8];
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msg.addr = 0x21;
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msg.buf = buf;
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msg.len = 2;
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msg.flags = 0;
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buf[0] = camera_ov772x_magic[i];
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buf[1] = camera_ov772x_magic[i + 1];
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ret = (ret < 0) ? ret : i2c_transfer(a, &msg, 1);
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}
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return ret;
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}
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static struct soc_camera_platform_info ov772x_info = {
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.iface = 0,
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.format_name = "RGB565",
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.format_depth = 16,
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.format = {
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.pixelformat = V4L2_PIX_FMT_RGB565,
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.colorspace = V4L2_COLORSPACE_SRGB,
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.width = 320,
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.height = 240,
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},
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.bus_param = SOCAM_PCLK_SAMPLE_RISING | SOCAM_HSYNC_ACTIVE_HIGH |
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SOCAM_VSYNC_ACTIVE_HIGH | SOCAM_MASTER | SOCAM_DATAWIDTH_8,
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.set_capture = ov772x_set_capture,
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};
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static struct platform_device migor_camera_device = {
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.name = "soc_camera_platform",
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.dev = {
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.platform_data = &ov772x_info,
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},
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};
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#endif /* CONFIG_I2C */
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static struct sh_mobile_ceu_info sh_mobile_ceu_info = {
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.flags = SOCAM_MASTER | SOCAM_DATAWIDTH_8 | SOCAM_PCLK_SAMPLE_RISING \
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| SOCAM_HSYNC_ACTIVE_HIGH | SOCAM_VSYNC_ACTIVE_HIGH,
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.enable_camera = camera_power_on,
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.disable_camera = camera_power_off,
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};
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static struct resource migor_ceu_resources[] = {
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[0] = {
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.name = "CEU",
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.start = 0xfe910000,
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.end = 0xfe91009f,
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.flags = IORESOURCE_MEM,
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},
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[1] = {
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.start = 52,
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.flags = IORESOURCE_IRQ,
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},
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[2] = {
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/* place holder for contiguous memory */
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},
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};
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static struct platform_device migor_ceu_device = {
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.name = "sh_mobile_ceu",
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.num_resources = ARRAY_SIZE(migor_ceu_resources),
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.resource = migor_ceu_resources,
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.dev = {
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.platform_data = &sh_mobile_ceu_info,
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},
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};
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static struct platform_device *migor_devices[] __initdata = {
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&smc91x_eth_device,
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&sh_keysc_device,
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&migor_lcdc_device,
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&migor_ceu_device,
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#ifdef CONFIG_I2C
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&migor_camera_device,
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#endif
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&migor_nor_flash_device,
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&migor_nand_flash_device,
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};
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static struct i2c_board_info migor_i2c_devices[] = {
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{
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I2C_BOARD_INFO("rs5c372b", 0x32),
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},
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{
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I2C_BOARD_INFO("migor_ts", 0x51),
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.irq = 38, /* IRQ6 */
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},
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};
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static int __init migor_devices_setup(void)
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{
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clk_always_enable("mstp214"); /* KEYSC */
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clk_always_enable("mstp200"); /* LCDC */
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clk_always_enable("mstp203"); /* CEU */
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platform_resource_setup_memory(&migor_ceu_device, "ceu", 4 << 20);
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i2c_register_board_info(0, migor_i2c_devices,
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ARRAY_SIZE(migor_i2c_devices));
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return platform_add_devices(migor_devices, ARRAY_SIZE(migor_devices));
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}
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__initcall(migor_devices_setup);
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static void __init migor_setup(char **cmdline_p)
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{
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/* SMC91C111 - Enable IRQ0 */
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ctrl_outw(ctrl_inw(PORT_PJCR) & ~0x0003, PORT_PJCR);
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|
|
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/* KEYSC */
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ctrl_outw(ctrl_inw(PORT_PYCR) & ~0x0fff, PORT_PYCR);
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ctrl_outw(ctrl_inw(PORT_PZCR) & ~0x0ff0, PORT_PZCR);
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ctrl_outw(ctrl_inw(PORT_PSELA) & ~0x4100, PORT_PSELA);
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ctrl_outw(ctrl_inw(PORT_HIZCRA) & ~0x4000, PORT_HIZCRA);
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ctrl_outw(ctrl_inw(PORT_HIZCRC) & ~0xc000, PORT_HIZCRC);
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|
|
|
/* NAND Flash */
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ctrl_outw(ctrl_inw(PORT_PXCR) & 0x0fff, PORT_PXCR);
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ctrl_outl((ctrl_inl(BSC_CS6ABCR) & ~0x00000600) | 0x00000200,
|
|
BSC_CS6ABCR);
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|
|
|
/* Touch Panel - Enable IRQ6 */
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ctrl_outw(ctrl_inw(PORT_PZCR) & ~0xc, PORT_PZCR);
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ctrl_outw((ctrl_inw(PORT_PSELA) | 0x8000), PORT_PSELA);
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|
ctrl_outw((ctrl_inw(PORT_HIZCRC) & ~0x4000), PORT_HIZCRC);
|
|
|
|
#ifdef CONFIG_SH_MIGOR_RTA_WVGA
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|
/* LCDC - WVGA - Enable RGB Interface signals */
|
|
ctrl_outw(ctrl_inw(PORT_PACR) & ~0x0003, PORT_PACR);
|
|
ctrl_outw(0x0000, PORT_PHCR);
|
|
ctrl_outw(0x0000, PORT_PLCR);
|
|
ctrl_outw(0x0000, PORT_PMCR);
|
|
ctrl_outw(ctrl_inw(PORT_PRCR) & ~0x000f, PORT_PRCR);
|
|
ctrl_outw((ctrl_inw(PORT_PSELD) & ~0x000d) | 0x0400, PORT_PSELD);
|
|
ctrl_outw(ctrl_inw(PORT_MSELCRB) & ~0x0100, PORT_MSELCRB);
|
|
ctrl_outw(ctrl_inw(PORT_HIZCRA) & ~0x01e0, PORT_HIZCRA);
|
|
#endif
|
|
#ifdef CONFIG_SH_MIGOR_QVGA
|
|
/* LCDC - QVGA - Enable SYS Interface signals */
|
|
ctrl_outw(ctrl_inw(PORT_PACR) & ~0x0003, PORT_PACR);
|
|
ctrl_outw((ctrl_inw(PORT_PHCR) & ~0xcfff) | 0x0010, PORT_PHCR);
|
|
ctrl_outw(0x0000, PORT_PLCR);
|
|
ctrl_outw(0x0000, PORT_PMCR);
|
|
ctrl_outw(ctrl_inw(PORT_PRCR) & ~0x030f, PORT_PRCR);
|
|
ctrl_outw((ctrl_inw(PORT_PSELD) & ~0x0001) | 0x0420, PORT_PSELD);
|
|
ctrl_outw(ctrl_inw(PORT_MSELCRB) | 0x0100, PORT_MSELCRB);
|
|
ctrl_outw(ctrl_inw(PORT_HIZCRA) & ~0x01e0, PORT_HIZCRA);
|
|
#endif
|
|
|
|
/* CEU */
|
|
ctrl_outw((ctrl_inw(PORT_PTCR) & ~0x03c3) | 0x0051, PORT_PTCR);
|
|
ctrl_outw(ctrl_inw(PORT_PUCR) & ~0x03ff, PORT_PUCR);
|
|
ctrl_outw(ctrl_inw(PORT_PVCR) & ~0x03ff, PORT_PVCR);
|
|
ctrl_outw(ctrl_inw(PORT_PWCR) & ~0x3c00, PORT_PWCR);
|
|
ctrl_outw(ctrl_inw(PORT_PSELC) | 0x0001, PORT_PSELC);
|
|
ctrl_outw(ctrl_inw(PORT_PSELD) & ~0x2000, PORT_PSELD);
|
|
ctrl_outw(ctrl_inw(PORT_PSELE) | 0x000f, PORT_PSELE);
|
|
ctrl_outw(ctrl_inw(PORT_MSELCRB) | 0x2200, PORT_MSELCRB);
|
|
ctrl_outw(ctrl_inw(PORT_HIZCRA) & ~0x0a00, PORT_HIZCRA);
|
|
ctrl_outw(ctrl_inw(PORT_HIZCRB) & ~0x0003, PORT_HIZCRB);
|
|
}
|
|
|
|
static struct sh_machine_vector mv_migor __initmv = {
|
|
.mv_name = "Migo-R",
|
|
.mv_setup = migor_setup,
|
|
};
|