android_kernel_xiaomi_sm8350/arch/powerpc/platforms/cell
Benjamin Herrenschmidt 2e19458312 [POWERPC] Cell interrupt rework
This patch reworks the cell iic interrupt handling so that:

 - Node ID is back in the interrupt number (only one IRQ host is created
for all nodes). This allows interrupts from sources on another node to
be routed non-locally. This will allow possibly one day to fix maxcpus=1
or 2 and still get interrupts from devices on BE 1. (A bit more fixing
is needed for that) and it will allow us to implement actual affinity
control of external interrupts.

 - Added handling of the IO exceptions interrupts (badly named, but I
re-used the name initially used by STI). Those are the interrupts
exposed by IIC_ISR and IIC_IRR, such as the IOC translation exception,
performance monitor, etc... Those get their special numbers in the IRQ
number space and are internally implemented as a cascade on unit 0xe,
class 1 of each node.

Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
Acked-by: Arnd Bergmann <arnd.bergmann@de.ibm.com>
Signed-off-by: Paul Mackerras <paulus@samba.org>
2006-10-04 14:52:08 +10:00
..
spufs Merge git://git.kernel.org/pub/scm/linux/kernel/git/paulus/powerpc 2006-10-03 08:52:26 -07:00
cbe_regs.c
cbe_regs.h
interrupt.c [POWERPC] Cell interrupt rework 2006-10-04 14:52:08 +10:00
interrupt.h [POWERPC] Cell interrupt rework 2006-10-04 14:52:08 +10:00
iommu.c
iommu.h
Kconfig
Makefile
pervasive.c
pervasive.h
ras.c
ras.h
setup.c [POWERPC] powerpc: Make RTAS console init generic 2006-08-25 13:27:35 +10:00
smp.c [POWERPC] Cleanup CPU inits 2006-08-25 13:27:35 +10:00
spider-pic.c [POWERPC] Cell interrupt rework 2006-10-04 14:52:08 +10:00
spu_base.c [POWERPC] Cell interrupt rework 2006-10-04 14:52:08 +10:00
spu_callbacks.c
spu_priv1_mmio.c
spu_syscalls.c