3145d8a6cc
Patch from Rod Whitby This patch adds support for a new arm/ixp4xx machine - the Iomega NAS 100d network attached storage product. The NAS100D is a consumer device containing a 266MHz Intel IXP420 processor, 16MB of flash, 64MB of RAM, a 160Gb internal IDE hard disk, and 802.11b/g wireless on an Atheros mini-PCI card. Work on porting the latest 2.6.x kernel to this device is being done by the NSLU2-Linux project (the same team who maintains the port to the Linksys NSLU2 device). In particular, the majority of this patch was authored by Alessandro Zummo, based on the work done for MACH_NSLU2 support by the NSLU2-Linux core team of developers. MACH_NAS100D (as implemented by this patch) can be enabled in jumbo ixp4xx kernels without any affect on the other machines supported by that kernel. This patch applies cleanly against 2.6.15-rc7 and should be trivial to apply to later kernel versions. It does not depend upon any other patches. Modified files (and number of lines inserted): arch/arm/mach-ixp4xx/Kconfig | 8 arch/arm/mach-ixp4xx/Makefile | 1 include/asm-arm/arch-ixp4xx/hardware.h | 1 include/asm-arm/arch-ixp4xx/irqs.h | 9 include/asm-arm/arch-ixp4xx/nas100d.h | 75 arch/arm/mach-ixp4xx/nas100d-pci.c | 77 arch/arm/mach-ixp4xx/nas100d-power.c | 69 arch/arm/mach-ixp4xx/nas100d-setup.c | 133 -- Rod Whitby (NSLU2-Linux project lead) Signed-off-by: Rod Whitby <rod@whitby.id.au> Signed-off-by: Alessandro Zummo <a.zummo@towertech.it> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
78 lines
1.9 KiB
C
78 lines
1.9 KiB
C
/*
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* arch/arm/mach-ixp4xx/nas100d-pci.c
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*
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* NAS 100d board-level PCI initialization
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*
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* based on ixdp425-pci.c:
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* Copyright (C) 2002 Intel Corporation.
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* Copyright (C) 2003-2004 MontaVista Software, Inc.
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*
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* Maintainer: http://www.nslu2-linux.org/
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License version 2 as
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* published by the Free Software Foundation.
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*
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*/
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#include <linux/config.h>
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#include <linux/pci.h>
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#include <linux/init.h>
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#include <asm/mach/pci.h>
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#include <asm/mach-types.h>
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void __init nas100d_pci_preinit(void)
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{
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set_irq_type(IRQ_NAS100D_PCI_INTA, IRQT_LOW);
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set_irq_type(IRQ_NAS100D_PCI_INTB, IRQT_LOW);
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set_irq_type(IRQ_NAS100D_PCI_INTC, IRQT_LOW);
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set_irq_type(IRQ_NAS100D_PCI_INTD, IRQT_LOW);
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set_irq_type(IRQ_NAS100D_PCI_INTE, IRQT_LOW);
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gpio_line_isr_clear(NAS100D_PCI_INTA_PIN);
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gpio_line_isr_clear(NAS100D_PCI_INTB_PIN);
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gpio_line_isr_clear(NAS100D_PCI_INTC_PIN);
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gpio_line_isr_clear(NAS100D_PCI_INTD_PIN);
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gpio_line_isr_clear(NAS100D_PCI_INTE_PIN);
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ixp4xx_pci_preinit();
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}
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static int __init nas100d_map_irq(struct pci_dev *dev, u8 slot, u8 pin)
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{
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static int pci_irq_table[NAS100D_PCI_MAX_DEV][NAS100D_PCI_IRQ_LINES] =
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{
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{ IRQ_NAS100D_PCI_INTA, -1, -1 },
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{ IRQ_NAS100D_PCI_INTB, -1, -1 },
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{ IRQ_NAS100D_PCI_INTC, IRQ_NAS100D_PCI_INTD, IRQ_NAS100D_PCI_INTE },
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};
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int irq = -1;
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if (slot >= 1 && slot <= NAS100D_PCI_MAX_DEV &&
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pin >= 1 && pin <= NAS100D_PCI_IRQ_LINES)
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irq = pci_irq_table[slot-1][pin-1];
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return irq;
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}
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struct hw_pci __initdata nas100d_pci = {
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.nr_controllers = 1,
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.preinit = nas100d_pci_preinit,
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.swizzle = pci_std_swizzle,
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.setup = ixp4xx_setup,
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.scan = ixp4xx_scan_bus,
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.map_irq = nas100d_map_irq,
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};
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int __init nas100d_pci_init(void)
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{
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if (machine_is_nas100d())
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pci_common_init(&nas100d_pci);
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return 0;
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}
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subsys_initcall(nas100d_pci_init);
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