cf18fd0146
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Acked-by: Pavel Machek <pavel@ucw.cz> Reviewed-by: Niklas Söderlund <niklas.soderlund+renesas@ragnatech.se> Signed-off-by: Mark Brown <broonie@kernel.org>
28 lines
1.3 KiB
Plaintext
28 lines
1.3 KiB
Plaintext
What: /sys/bus/i2c/devices/.../bd9571mwv-regulator.*.auto/backup_mode
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Date: Jul 2018
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KernelVersion: 4.19
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Contact: Geert Uytterhoeven <geert+renesas@glider.be>
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Description: Read/write the current state of DDR Backup Mode, which controls
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if DDR power rails will be kept powered during system suspend.
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("on"/"1" = enabled, "off"/"0" = disabled).
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Two types of power switches (or control signals) can be used:
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A. With a momentary power switch (or pulse signal), DDR
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Backup Mode is enabled by default when available, as the
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PMIC will be configured only during system suspend.
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B. With a toggle power switch (or level signal), the
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following steps must be followed exactly:
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1. Configure PMIC for backup mode, to change the role of
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the accessory power switch from a power switch to a
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wake-up switch,
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2. Switch accessory power switch off, to prepare for
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system suspend, which is a manual step not controlled
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by software,
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3. Suspend system,
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4. Switch accessory power switch on, to resume the
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system.
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DDR Backup Mode must be explicitly enabled by the user,
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to invoke step 1.
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See also Documentation/devicetree/bindings/mfd/bd9571mwv.txt.
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Users: User space applications for embedded boards equipped with a
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BD9571MWV PMIC.
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