Geert Uytterhoeven 805665aa52 clocksource/drivers/sh_cmt: Make sure channel clock supply is enabled ... [ Upstream commit 2a97d55333e4299f32c98cca6dc5c4db1c5855fc ] The Renesas Compare Match Timer 0 and 1 (CMT0/1) variants have a register to control the clock supply to the individual channels. Currently the driver does not touch this register, and relies on the documented initial value, which has the clock supply enabled for all channels present. However, when Linux starts on the APE6-EVM development board, only the clock supply to the first CMT1 channel is enabled. Hence the first channel (used as a clockevent) works, while the second channel (used as a clocksource) does not. Note that the default system clocksource is the Cortex-A15 architectured timer, and the user needs to manually switch to the CMT1 clocksource to trigger the broken behavior. Fix this by removing the fragile dependency on implicit reset and/or boot loader state, and by enabling the clock supply explicitly for all channels used instead. This requires postponing the clk_disable() call, else the timer's registers cannot be accessed in sh_cmt_setup_channel(). Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Reviewed-by: Niklas Söderlund <niklas.soderlund+renesas@ragnatech.se> Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org> Link: https://lore.kernel.org/r/20201210194648.2901899-1-geert+renesas@glider.be Signed-off-by: Sasha Levin <sashal@kernel.org>		2023-01-18 11:40:56 +01:00
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acpi_pm.c
arc_timer.c
arm_arch_timer.c
arm_global_timer.c
armv7m_systick.c
asm9260_timer.c
bcm2835_timer.c
bcm_kona_timer.c
clksrc_st_lpc.c
clksrc-dbx500-prcmu.c
clps711x-timer.c
dummy_timer.c
dw_apb_timer_of.c
dw_apb_timer.c
em_sti.c
exynos_mct.c
h8300_timer8.c
h8300_timer16.c
h8300_tpu.c
hyperv_timer.c	clocksource: hyper-v: unexport __init-annotated hv_init_clocksource()	2022-06-22 14:11:21 +02:00
i8253.c
ingenic-timer.c
jcore-pit.c
Kconfig
Makefile
mips-gic-timer.c
mmio.c
mps2-timer.c
mxs_timer.c
nomadik-mtu.c
numachip.c
renesas-ostm.c
samsung_pwm_timer.c
scx200_hrt.c
sh_cmt.c	clocksource/drivers/sh_cmt: Make sure channel clock supply is enabled	2023-01-18 11:40:56 +01:00
sh_mtu2.c
sh_tmu.c
timer-armada-370-xp.c
timer-atcpit100.c
timer-atlas7.c
timer-atmel-pit.c
timer-atmel-st.c
timer-atmel-tcb.c
timer-cadence-ttc.c
timer-cs5535.c
timer-davinci.c
timer-digicolor.c
timer-efm32.c
timer-fsl-ftm.c
timer-fttmr010.c
timer-gx6605s.c
timer-imx-gpt.c
timer-imx-sysctr.c
timer-imx-tpm.c
timer-integrator-ap.c
timer-ixp4xx.c	clocksource/drivers/ixp4xx: remove EXPORT_SYMBOL_GPL from ixp4xx_timer_setup()	2022-07-07 17:36:53 +02:00
timer-keystone.c
timer-lpc32xx.c
timer-mediatek.c
timer-meson6.c
timer-milbeaut.c
timer-mp-csky.c
timer-npcm7xx.c
timer-nps.c
timer-of.c
timer-of.h
timer-orion.c
timer-owl.c
timer-oxnas-rps.c
timer-pistachio.c
timer-prima2.c
timer-probe.c
timer-pxa.c
timer-qcom.c
timer-rda.c
timer-riscv.c	Revert "clocksource/drivers/riscv: Events are stopped during CPU suspend"	2022-12-08 11:23:06 +01:00
timer-rockchip.c
timer-sp804.c	clocksource/drivers/sp804: Avoid error on multiple instances	2022-06-14 18:12:00 +02:00
timer-sp.h
timer-sprd.c
timer-stm32.c
timer-sun4i.c
timer-sun5i.c
timer-tango-xtal.c
timer-tegra.c
timer-ti-32k.c
timer-ti-dm.c
timer-u300.c
timer-versatile.c
timer-vf-pit.c
timer-vt8500.c
timer-zevio.c