9bef5de1e0
Header files for STMP37xx boards Signed-off-by: dmitry pervushin <dpervushin@embeddedalley.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
100 lines
3.1 KiB
C
100 lines
3.1 KiB
C
/*
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* Freescale STMP37XX interrupts
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*
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* Copyright (C) 2005 Sigmatel Inc
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*
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* Copyright 2008 Freescale Semiconductor, Inc. All Rights Reserved.
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* Copyright 2008 Embedded Alley Solutions, Inc All Rights Reserved.
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*/
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/*
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* The code contained herein is licensed under the GNU General Public
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* License. You may obtain a copy of the GNU General Public License
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* Version 2 or later at the following locations:
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*
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* http://www.opensource.org/licenses/gpl-license.html
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* http://www.gnu.org/copyleft/gpl.html
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*/
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#ifndef _ASM_ARCH_IRQS_H
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#define _ASM_ARCH_IRQS_H
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#define IRQ_DEBUG_UART 0
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#define IRQ_COMMS_RX 1
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#define IRQ_COMMS_TX 1
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#define IRQ_SSP2_ERROR 2
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#define IRQ_VDD5V 3
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#define IRQ_HEADPHONE_SHORT 4
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#define IRQ_DAC_DMA 5
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#define IRQ_DAC_ERROR 6
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#define IRQ_ADC_DMA 7
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#define IRQ_ADC_ERROR 8
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#define IRQ_SPDIF_DMA 9
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#define IRQ_SAIF2_DMA 9
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#define IRQ_SPDIF_ERROR 10
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#define IRQ_SAIF1_IRQ 10
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#define IRQ_SAIF2_IRQ 10
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#define IRQ_USB_CTRL 11
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#define IRQ_USB_WAKEUP 12
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#define IRQ_GPMI_DMA 13
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#define IRQ_SSP1_DMA 14
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#define IRQ_SSP_ERROR 15
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#define IRQ_GPIO0 16
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#define IRQ_GPIO1 17
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#define IRQ_GPIO2 18
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#define IRQ_SAIF1_DMA 19
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#define IRQ_SSP2_DMA 20
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#define IRQ_ECC8_IRQ 21
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#define IRQ_RTC_ALARM 22
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#define IRQ_UARTAPP_TX_DMA 23
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#define IRQ_UARTAPP_INTERNAL 24
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#define IRQ_UARTAPP_RX_DMA 25
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#define IRQ_I2C_DMA 26
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#define IRQ_I2C_ERROR 27
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#define IRQ_TIMER0 28
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#define IRQ_TIMER1 29
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#define IRQ_TIMER2 30
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#define IRQ_TIMER3 31
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#define IRQ_BATT_BRNOUT 32
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#define IRQ_VDDD_BRNOUT 33
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#define IRQ_VDDIO_BRNOUT 34
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#define IRQ_VDD18_BRNOUT 35
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#define IRQ_TOUCH_DETECT 36
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#define IRQ_LRADC_CH0 37
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#define IRQ_LRADC_CH1 38
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#define IRQ_LRADC_CH2 39
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#define IRQ_LRADC_CH3 40
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#define IRQ_LRADC_CH4 41
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#define IRQ_LRADC_CH5 42
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#define IRQ_LRADC_CH6 43
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#define IRQ_LRADC_CH7 44
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#define IRQ_LCDIF_DMA 45
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#define IRQ_LCDIF_ERROR 46
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#define IRQ_DIGCTL_DEBUG_TRAP 47
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#define IRQ_RTC_1MSEC 48
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#define IRQ_DRI_DMA 49
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#define IRQ_DRI_ATTENTION 50
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#define IRQ_GPMI_ATTENTION 51
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#define IRQ_IR 52
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#define IRQ_DCP_VMI 53
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#define IRQ_DCP 54
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#define IRQ_RESERVED_55 55
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#define IRQ_RESERVED_56 56
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#define IRQ_RESERVED_57 57
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#define IRQ_RESERVED_58 58
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#define IRQ_RESERVED_59 59
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#define SW_IRQ_60 60
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#define SW_IRQ_61 61
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#define SW_IRQ_62 62
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#define SW_IRQ_63 63
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#define NR_REAL_IRQS 64
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#define NR_IRQS (NR_REAL_IRQS + 32 * 3)
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/* TIMER and BRNOUT are FIQ capable */
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#define FIQ_START IRQ_TIMER0
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/* Hard disk IRQ is a GPMI attention IRQ */
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#define IRQ_HARDDISK IRQ_GPMI_ATTENTION
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#endif /* _ASM_ARCH_IRQS_H */
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