35ddd068fb
... so we use the same code with Quad core cpu as old opteron. This patch is useful when acpi=off or _PXM is not there in DSDT. Signed-off-by: Yinghai Lu <yinghai.lu@sun.com> Signed-off-by: Ingo Molnar <mingo@elte.hu> Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
132 lines
2.9 KiB
C
132 lines
2.9 KiB
C
#include <linux/init.h>
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#include <linux/pci.h>
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#include <asm/pci-direct.h>
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#include <asm/mpspec.h>
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#include <linux/cpumask.h>
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#include <linux/topology.h>
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/*
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* This discovers the pcibus <-> node mapping on AMD K8.
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*
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* RED-PEN need to call this again on PCI hotplug
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* RED-PEN empty cpus get reported wrong
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*/
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#define NODE_ID(dword) ((dword>>4) & 0x07)
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#define LDT_BUS_NUMBER_REGISTER_0 0xE0
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#define LDT_BUS_NUMBER_REGISTER_1 0xE4
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#define LDT_BUS_NUMBER_REGISTER_2 0xE8
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#define LDT_BUS_NUMBER_REGISTER_3 0xEC
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#define NR_LDT_BUS_NUMBER_REGISTERS 4
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#define SECONDARY_LDT_BUS_NUMBER(dword) ((dword >> 16) & 0xFF)
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#define SUBORDINATE_LDT_BUS_NUMBER(dword) ((dword >> 24) & 0xFF)
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#define PCI_DEVICE_ID_K8HTCONFIG 0x1100
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#define PCI_DEVICE_ID_K8_10H_HTCONFIG 0x1200
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#define PCI_DEVICE_ID_K8_11H_HTCONFIG 0x1300
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#ifdef CONFIG_NUMA
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#define BUS_NR 256
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static int mp_bus_to_node[BUS_NR];
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void set_mp_bus_to_node(int busnum, int node)
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{
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if (busnum >= 0 && busnum < BUS_NR)
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mp_bus_to_node[busnum] = node;
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}
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int get_mp_bus_to_node(int busnum)
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{
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int node = -1;
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if (busnum < 0 || busnum > (BUS_NR - 1))
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return node;
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node = mp_bus_to_node[busnum];
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/*
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* let numa_node_id to decide it later in dma_alloc_pages
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* if there is no ram on that node
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*/
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if (node != -1 && !node_online(node))
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node = -1;
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return node;
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}
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#endif
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/**
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* early_fill_mp_bus_to_node()
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* called before pcibios_scan_root and pci_scan_bus
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* fills the mp_bus_to_cpumask array based according to the LDT Bus Number
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* Registers found in the K8 northbridge
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*/
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__init static int
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early_fill_mp_bus_to_node(void)
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{
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#ifdef CONFIG_NUMA
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int i, j;
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unsigned slot;
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u32 ldtbus;
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u32 id;
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int node;
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u16 deviceid;
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u16 vendorid;
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int min_bus;
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int max_bus;
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static int lbnr[NR_LDT_BUS_NUMBER_REGISTERS] = {
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LDT_BUS_NUMBER_REGISTER_0,
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LDT_BUS_NUMBER_REGISTER_1,
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LDT_BUS_NUMBER_REGISTER_2,
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LDT_BUS_NUMBER_REGISTER_3
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};
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for (i = 0; i < BUS_NR; i++)
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mp_bus_to_node[i] = -1;
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if (!early_pci_allowed())
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return -1;
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slot = 0x18;
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id = read_pci_config(0, slot, 0, PCI_VENDOR_ID);
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vendorid = id & 0xffff;
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if (vendorid != PCI_VENDOR_ID_AMD)
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goto out;
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deviceid = (id>>16) & 0xffff;
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if ((deviceid != PCI_DEVICE_ID_K8HTCONFIG) &&
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(deviceid != PCI_DEVICE_ID_K8_10H_HTCONFIG) &&
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(deviceid != PCI_DEVICE_ID_K8_11H_HTCONFIG))
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goto out;
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for (i = 0; i < NR_LDT_BUS_NUMBER_REGISTERS; i++) {
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ldtbus = read_pci_config(0, slot, 1, lbnr[i]);
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/* Check if that register is enabled for bus range */
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if ((ldtbus & 7) != 3)
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continue;
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min_bus = SECONDARY_LDT_BUS_NUMBER(ldtbus);
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max_bus = SUBORDINATE_LDT_BUS_NUMBER(ldtbus);
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node = NODE_ID(ldtbus);
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for (j = min_bus; j <= max_bus; j++)
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mp_bus_to_node[j] = (unsigned char) node;
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}
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out:
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for (i = 0; i < BUS_NR; i++) {
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node = mp_bus_to_node[i];
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if (node >= 0)
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printk(KERN_DEBUG "bus: %02x to node: %02x\n", i, node);
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}
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#endif
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return 0;
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}
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postcore_initcall(early_fill_mp_bus_to_node);
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