android_kernel_xiaomi_sm8350/include/asm-arm/arch-sa1100/hardware.h
Nicolas Pitre 61c8c158c8 [ARM] 2892/1: remove gcc workaround for direct access to absolute memory addresses
Patch from Nicolas Pitre

It used to make a difference in the gcc-2.95 era.  However these days
modern gcc apparently got better at not being influenced by such constructs
(which is good in general) and therefore such workaround is of no real
advantage anymore.
The good news is that gcc (from version 4.1.0) is now fixed with
regards to the defficiency this workaround was trying to address.
For those interested the patch can easily be backported to older gcc
versions and can be found here:
http://gcc.gnu.org/cgi-bin/cvsweb.cgi/gcc/gcc/config/arm/arm.c.diff?r1=1.476&r2=1.478
and also here:
http://savannah.gnu.org/cgi-bin/viewcvs/gcc/gcc/gcc/config/arm/arm.c.diff?r1=text&tr1=1.476&r2=text&tr2=1.478&diff_format=u

Signed-off-by: Nicolas Pitre <nico@cam.org>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2005-09-08 23:07:40 +01:00

70 lines
1.6 KiB
C

/*
* linux/include/asm-arm/arch-sa1100/hardware.h
*
* Copyright (C) 1998 Nicolas Pitre <nico@cam.org>
*
* This file contains the hardware definitions for SA1100 architecture
*
* 2000/05/23 John Dorsey <john+@cs.cmu.edu>
* Definitions for SA1111 added.
*/
#ifndef __ASM_ARCH_HARDWARE_H
#define __ASM_ARCH_HARDWARE_H
#include <linux/config.h>
/* Flushing areas */
#define FLUSH_BASE_PHYS 0xe0000000 /* SA1100 zero bank */
#define FLUSH_BASE 0xf5000000
#define FLUSH_BASE_MINICACHE 0xf5800000
#define UNCACHEABLE_ADDR 0xfa050000
/*
* We requires absolute addresses i.e. (PCMCIA_IO_0_BASE + 0x3f8) for
* in*()/out*() macros to be usable for all cases.
*/
#define PCIO_BASE 0
/*
* SA1100 internal I/O mappings
*
* We have the following mapping:
* phys virt
* 80000000 f8000000
* 90000000 fa000000
* a0000000 fc000000
* b0000000 fe000000
*/
#define VIO_BASE 0xf8000000 /* virtual start of IO space */
#define VIO_SHIFT 3 /* x = IO space shrink power */
#define PIO_START 0x80000000 /* physical start of IO space */
#define io_p2v( x ) \
( (((x)&0x00ffffff) | (((x)&0x30000000)>>VIO_SHIFT)) + VIO_BASE )
#define io_v2p( x ) \
( (((x)&0x00ffffff) | (((x)&(0x30000000>>VIO_SHIFT))<<VIO_SHIFT)) + PIO_START )
#ifndef __ASSEMBLY__
# define __REG(x) (*((volatile unsigned long *)io_p2v(x)))
# define __PREG(x) (io_v2p((unsigned long)&(x)))
#else
# define __REG(x) io_p2v(x)
# define __PREG(x) io_v2p(x)
#endif
#include "SA-1100.h"
#ifdef CONFIG_SA1101
#include "SA-1101.h"
#endif
#endif /* _ASM_ARCH_HARDWARE_H */